Analysis of the Single-Phase Split-Source Inverter by using Different DC–AC Topology

Download Full-Text PDF Cite this Publication

Text Only Version

Analysis of the Single-Phase Split-Source Inverter by using Different DCAC Topology

1Omkar G. Londhe 2 Mrs. Saba L. Shaikh

1 M. Tech (Power System) Student, Walchand College of Engineering, Sangli, India.

2 Assistant Professor (Departmet of Electrical Engg.), Walchand College of Engineering, Sangli, India.

Abstract: This paper explores the working of the Single Phase Split-Source Inverter (SSI), using an unconventional one- directional dcac inverter setup. We have used two typical cathode diodes in a single unit in this configuration. The features behind utilizing the three different carrier signals and their differences are discussed with single phase SSI. Also, a novel control strategy, Modified sine pulse width modulation (M- SPWM) technique is introduced. Also this paper discusses the MATLAB model with its simulation results of 1- KVA single phase SSI.

Index terms: Sine pulse width modulation (SPWM), Modified SPWM (M-SPWM), Split-Source Inverter (SSI), Voltage source Inverter (VSI).


    Single stage inverters have witnessed a widespread adoption over the past decade to substitute standard two stage topology inverters. This architecture has advanced in terms of reducing circuit difficulty and physical size as a way of increasing the performance of overall system. Advantages of this topology are as follows:-1)DC link voltage continuous;

    2) continuous dc current input; 3) for higher voltage gains it gives low voltage stresses; (4) passive component count is less; (5) use of only additional input diode (6) for basic operation standard modulation technique used similarly as the VSI; and (7) no additional boosting states are required. Three different carrier signals are discussed which are the triangular, trail-edge and lead-edge saw tooth carriers with the single phase SSI modulation and their characteristics are highlighted. In this configuration, single-phase operation allows to use dual common-cathode diodes in one unit as a replacement of using separate two diodes. This helps to achieve less parasitic inductance in these diodes' commutation direction. Furthermore it results into fewer voltage spikes at the output across the various switches and increasing the overall efficiency of the inverter.


    The working of split source inverter topology for single phase is as shown in Fig.1 Similar to the three phase topology. Since the conventional 4-switch bridge is used, four switching states are considered to accomplish the process of boosting inside the inversion one. When at least one of the upper leg switch or both switches are ON, i.e. SxU or SyU, the inductor L is charging. Meanwhile, when both the lower switches ON, where inductor discharges and capacitor C charge. This state is called as zero state, where both the switches from lower leg are switched OFF.

    Figure 1: Single-phase SSI configuration in one unit, with two typical common cathode diodes.

    Using standard sine pulse width modulation (SPWM) technique the above switching states can be achieved as shown in Fig. 3. Inductor L charges when carrier signal is higher than the envelop specified by max(v*x, v*y). If the carrier signal is lower than the envelope specified by max(v*x, v*y), inductor L discharges into C through anti- parallel diodes of the lower leg. Because the envelope specified by max(v*x, v*y) oscillates continuously, this results in charging and discharging of inductor L with oscillating duty cycle. Therefore, there is an increase in the low frequencies at the dc-side voltage and current. Also, it increases the voltage stress across the switches.

    Figure 2: Four switching states by using SPWM technique: a)'11' 'Zero State' b)'10' 'Active State' c)'01' 'Active State' d)'00' 'Zero State'.

    Figure 3: (a) SPW modulation technique; (b) M-SPW modulation technique.

    Thus, we implement Modified SPWM (M-SPWM) technique which has a constant charge and discharge period of inductor L and by setting minimum reference signal value at the minimum carrier signal value it gives lower voltage stresses.


    As shown in Fig. 2 and 4(a) for single phase SSI, diode Dx is always conductive and Dy commutes at various values of current for half fundamental period. This can be demonstrated during a single switching process with three separate states as below.

    Figure 4: (a) The modified SPWM (M-SPWM) scheme using the triangular carrier for one switching cycle.

    Figure 4: (b) The modified SPWM (M-SPWM) scheme using the trail- edge saw tooth carrier for one cycle of switching.

    Figure 4: (c) The modified SPWM (M-SPWM) scheme using the lead -edge saw tooth carrier for one cycle ofswitching.

    The first OFF turn depends on the lower envelope intersection point defined by min(v*x, v*y) with the carrier signal, which occurs with different current values during the charging process. Meanwhile the second turning OFF happens at the end of the discharge process with a constant current value equal to half the actual minimum value of the inductor, Because it also depends on the intersection point of the upper constant envelope min(v*x, v*y) identified by the carrier signal. In addition, additional conductive losses occur in other switches because of reverse recovery current. It is worth noting that this commuting current in the diodes corresponds with the commuting current in the switches. Reducing this current effect would help minimize switching losses. The figure 4(c) shows that in each switching cycle Dy turns OFF once. Hence, saw tooth carrier reduces the number of commutation by half compared with

    triangular carrier signal. Comparing Fig 4(b) and (c), when we use leading-edge saw tooth carrier, as the input current

    reaches the lowest value lowest possible turning OFF current of the commutation diode (Dy) results.

    Hence, the following features exists as we use the saw tooth

    carrier:1) Commutation numbers are reduced to half 2) The lead-edge saw tooth carrier helps to achieve minimum possible commutation current; and 3) Since the differential output is not same, the need requirement for output filter is greater Therefore, saw tooth carrier switching frequency should be doubled to maintain a constant differential output voltage for the final part, and similar output filters should be used. Finally, due to commutation of diodes at lowest possible value of current there is slight increase in the efficiency of the inverter when lead-edge saw tooth carrier is used.


    a) MATLAB Simulated Power Circuit Diagram

    1. MATLAB Simulated Control circuit Diagram

      Figure 5: (b) MATLAB Simulation of Control circuit diagram for Single Phase Split source Inverter.

    2. Specification and Designed Parameters of Single phase SSI

    Table 1

    Specification and Design Parameters










    L (mH)



















    Figure 5: (a) MATLAB Simulation of Power circuit diagram for single phase split-source inverter.

    Figure 6(a) Simulation results using lead-edge sawtooth carrier for Vin = 120 V. (1) Output voltage (Vxy) (2) Voltage across load (VLoad).

    Figure 6(b) : (3) Current across Load (I_Load), (4) Voltage across DC-Link Capacitor (V_inv)

    Figure 6(c) : (5) Current across Inductor (I_in), (6) Current across Diode (Dx) – (I_Dx)


    Considering the unidirectional dc ac operation, the operation of the SSIs in this paper was analyzed for single phase application, using an unconventional topology, in which a dual-diode common-cathode kit could be used instead of two separate diodes to mitigate the voltage spikes in the output voltage of different switches. Among the three different carrier signals the lead-edge sawtooth carrier signal achieves the lowest current value possible for one commutation per cycle of the input diodes, which is equal to half of the minimum input current. Also to maintain similar differential output switching frequency is doubled which helps to use similar filter requirements



  1. Fang Zheng Peng, Z-Source Inverter, IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 39, NO. 2, MARCH/APRIL 2003.

  2. O. Ellabban and H. Abu-Rub, Z-source inverter: Topology improvements review, IEEE Ind. Electron. Mag., vol. 10, no. 1, pp. 6 24, Mar. 2016.

  3. H. Ribeiro, A. Pinto, and B. Borges, Single-stage dc-ac converter forphotovoltaic systems, in Proc. IEEE Energy Convers. Congr. Expo.,Sep. 2010, pp. 604610.

  4. M. K. Nguyen, Y. C. Lim, and S. J. Park, A comparison between single phase quasi-Z-source and quasi-switched boost inverters, IEEE Trans. Ind. Electron., vol. 62, no. 10, pp. 63366344, Oct. 2015.

  5. H. Ribeiro, A. Pinto, and B. Borges, Single-stage dc-ac converter for photovoltaic systems, in Proc. IEEE Energy Convers. Congr. Expo.,Sep. 2010, pp. 604610.

  6. S. S. Lee andY. E. Heng, Improved single phase split- source inverter withhybrid quasi-sinusoidal and constant PWM, IEEE Trans. Ind. Electron.,vol. 64, no. 3, pp. 20242031, Mar. 2017.

  7. A. Abdelhakim, P. Mattavelli, and G. Spiazzi, Three- phase split- sourceinverter (SSI): Analysis and modulation, IEEE Trans. Power Electron.,vol. 31, no. 11, pp. 74517461, Nov. 2016.

  8. A. Abdelhakim, P. Mattavelli, and G. Spiazzi, Three- phase three- levelflying capacitors split-source inverters: Analysis and modulation, IEEETrans. Ind. Electron., vol. 64, no. 6, pp. 45714580, Jun. 2017.

  9. A. Abdelhakim, P.Mattavelli, and G. Spiazzi, Three- level operation of thesplit-source inverter using the flying capacitors topology, in Proc. 8th Int.Power Electron. Motion Control Conf., May 2016, pp. 223 228.

  10. A. Abdelhakim and P. Mattavelli, Analysis of the three-level diodeclampedsplit-source inverter, in Proc. 42nd Annu. Conf. IEEE Ind.Electron. Soc., Nov. 2016, pp. 32593264.

Leave a Reply

Your email address will not be published. Required fields are marked *