Wireless Inter Connectivity Among Chiplets Hosting Multi-Core Processors

Wireless Inter Connectivity Among Chiplets Hosting Multi-Core Processors

Sapna P J, Kavita Guddad

Department of Electronics and Communication Engineering Dayananda Sagar College of Engineering

Bengaluru, India

AbstractTraditional Network-on-chip (NoC) connectivity is constrained by high latency and energy in wired connectivity as the number of cores integrated on a single chip grows. In the coming years, improving the properties of metal wires does not meet network performance needs. A new paradigm has to be investigated to satisfy the increasing demands. One such method is wireless connection between multi-cores. The NoC allows enormous numbers of embedded cores to be combined on a single device. Due to excessive latency and large power consumption resulting from multi-hop links utilized in data transmission, the existing way of building a NoC using planar metal interconnects is inadequate. Wireless NoCs (WiNoC) provide communication linkages amongst several pairs of cores, and such interconnectivity should be flexible to intercore traffic needs in the best-case scenario. This necessitates the incorporation of at least one antenna into each core. As a result, WiNoCs are more likely to supplement rather than totally replace wired connections. By instituting a single-hop links amongst remote cores in the chip, on- chip wireless interconnects have been proposed to provide data communication paths amongst cores in System-on-Chips (SoCs) in the era of multi-cores. The analysis was pertaining to parameters such as S-parameters, VSWR, return loss, operational frequency, to understand its behaviour in wireless channels. The comparison study of various antenna materials for short-range wireless communication is discussed in the final segment.

Keywords Wireless network on chip(WiNoC), System on chip(SoC), Network On Chip(NoC), intra chip wireless communication

1. INTRODUCTION

   The trend of combining a huge number of functional cores onto a single die or SoC has grown in response to the demand for high-speed and high-performance circuits. However, as device technology scales, the interconnect network necessary for communication between these functional and storage cores faces additional design issues. As a result, alternate design solutions at the connection or architectural level are required. To structure the architecture of the on-chip inter-core communication infrastructure, modern design solutions such as NoC have been proposed. Due to excessive latency and large power intake resulting from multi-hop links utilized in data transmission, the existing way of building a NoC using planar metal-interconnects is inadequate. To address these concerns, high-bandwidth single-hop long-range wireless connectivity can be used as a substitute for multi-hop wire interconnects in a NoC. This brings up numerous ideas for investigating the design of WinoCs with on-chip-antennas[1], appropriate transceivers, and routers in sufficient complexity. Furthermore, because this is a new technology, on-chip wireless links must

   overcome major integration problems. The effect of antenna and substrate materials on short-range wireless communication is discussed in this work.

2. OVERVIEW

   WiNoCs offer communication linkages amongst several pairs of cores, and such interconnectivity should be flexible to inter-core traffic demands in the best-case scenario. This necessitates the incorporation of at least one antenna into each core. As a result, WiNoCs are more likely to supplement rather than totally replace wired connections. Carrier frequencies in the range of GHz and higher, possibly into the optical region or terahertz, are required to handle increased data speeds. WiNoC's success depends on the design and production of effective antennas. The benefit of WiNoC is that it simply requires the inclusion of an antenna and a transmitter-receiver at the nodes that we wish to interact with, to establish wireless connectivity. Since the network is not connected to any path infrastructure, it has the flexibility to adapt to the changing bandwidth and delay requirements of the architecture. The wavelength of terahertz electromagnetic waves is projected to be hundreds of micro- meters, hence forthcoming on-chip metallic antennas will be hundreds of micro-meters long. The method of integrating at least one antenna per core may become impractical because cores shrink with each iteration of CMOS technology and get as small as a few hundred micro-metres. Further lowering the size of metallic antennas will not solve these problems because this will force the usage of frequencies ranging from near infrared to optical. Due to the poor mobility of electrons in metals in nanometer size structures and the difficulties in developing a transceiver that can function at this extremely high frequency, the viability of wireless communications at the core level would be compromised if this strategy was used[2][3]. The on- chip antenna material [4][11][12] study in the domain of chip wireless networks[5] is one of the difficulties that has yet to be thoroughly investigated.

3. METHODOLOGY

   The methodology of the proposed system includes the following steps

   1. Selection of Antenna

      Vivaldi antenna is selected here [6][7][8] as it is one of the most promising antennas due to its wide spectrum and usage in a variety of emerging applications. The major goal of this work is to model Vivaldi antenna with multilayer substrate and to check its parameters

   2. Slection of materials for antenna and substrate

      Copper is used for conductive layer of the antenna. 5 layers are used for the substrate construction. Top layer being the conductive layer followed by dielectric, SiO2, Si and ground.

   3. Analyzing the antenna parameters

      Antenna parameters like power, VSWR, S-parameters, far-field, directivity and others are analyzed after simulation through obtained graphs.

   4. Changing the materials for the antenna

   Different materials like Aluminum, Tantalum are used as obstacle material in between the antenna and the impact of these materials on the antenna are observed by analyzing the above antenna parameters.

4. IMPLEMENTATION

   Wireless chip-scale communications refer to the use of integrated antennas to provide intra-chip interconnections [9, 10]. Logically divide the whole NoC into four subnets. An antenna is placed in each subnet. Communication within the subnets is still through wires, while wireless links are utilized for inter-subnet data exchange. This is called Hybrid nature of the WiNoC. A conceptual figure is shown in the Fig.1.

   Fig. 1 Hybrid nature of WiNoC

   Several antenna designs have been studied for high frequency communications for intra-chip communication over the previous decade. Wireless NoC (WiNoC) is one of the promising scalable interconnection designs. As a result, all wired linkages should be replaced with wireless ones in a pure wireless design. Instead of using only wireless links to transport data amongst nodes, hybrid technology employs both wired and wireless connectivity to build on-chip networks. The hybrid architecture is based on the premise that a simple and dependable short-distance wired link is suitable for local traffic, whereas a wireless link can greatly increase long-distance communication performance and power efficiency.

   First a single Vivaldi antenna shown in fig. 2, whose material iscopper is placed on a substrate and tested for its working. A micro strip feed line is utilized for this because of its simplicity, ease of manufacture, and enhanced dependability. Various Vivaldi antennas are created and tested using CST microwave studio. A five layered substrate is modelled with the dimensions 20×20 m2.

   Fig. 2. Vivaldi Antenna with single layer substrate.

   It consists of 5 different layers with varying thickness starting from conductive layer to the bottom ground layer as given in the following Table 1 and multilayer substrate for antenna is shown in fig. 3.

   Table 1 Thickness of Substrate Layers

   S. No	Layers	Thickness in mm
   1	Gnd	0.002
   2	Si	0.0035
   3	SiO2	0.00015
   4	Dielectric	0.003
   5	Conductive layers	0.001

   Fig. 3. Multilayer substrate for antenna.

   The substrate is then logically divided in such a way that four subnets are formed and one antenna is placed in each subnet as shown in fig. 4. This model is simulated at the frequency range of 30GHz to 60GHz.

   Fig. 4. Antennas placed on substrate

5. RESULTS AND DISCUSSION

   Antenna structure materials are typically conductive elements that are capable of emitting radio frequency waves. Wireless commination in voice and data services require novel method to overcome problems with disturbances caused by obstacles or environmental factor and to bring it down to nanoscale was a challenging task. The approach to solve this problem was by giving analysis for different antenna materials and antenna placement.

   1. Modelling of antennas on substrate without any obstruction material.

      The model is simulated at the frequency range of 30GHz to 60GHz. Antenna parameters like power, VSWR, S-parameters, far-field, directivity and others can be observed in the below graphs.

      Fig. 5 The simulated S-parameters show dip at 40GHz

      The simulated S-parameter for antenna array is plotted for 45GHz. S11 defined as a reflection coefficient, whereas S21 is transmission coefficient. They are majorly used to calculate the gain of an antenna. S21 represents the power transmitted from port1 to port2. Here almost same power is transmitted by all the ports. From the reflection coefficient there is energy loss during propagation at that frequency.

      Fig. 6 VSWR is ~1.2 at the maximum radiation frequency of 40 GHz

      VSWR = 1.2 and corresponding reflection coefficient can be calculated as 0.09. The reflection coefficient in terms of voltage represents how much power is being reflected.

      Fig. 7 Simulated power 0.5W, power accepted at all port by the antennas is 0.4832W.

      The power graph in fig. 7 shows that simulated power is 0.5 W and the power accepted at the port is 0.4832W. The loss in metal and dielectric is almost negligible.

      Fig. 8 Far field directivity at 30GHz, 45GHz and 60GHz

      In fig. 8 shows that the reflection loss is below -10db. At the frequency below cutoff, mixed response of the feeding structure of the waveguide section is obtained. This is mainly due to the distortions to the field pattern.

   2. Modelling of Antennas on the substrate with aluminium as obstacle material

      Aluminium is one of the resistor materials hence we observe the changes that occurs in the presence of resistor material.

      Fig. 9 Antennas on substrate with aluminium

      Fig. 10 The simulated S-parameter shows dip at 40 GHz

      The simulated S-parameter for antenna array is plotted for 45GHz. S11 defined as a reflection coefficient, whereas S21 is transmission coefficient. They are majorly used to calculate the gain of an antenna. S21 represents the power transmitted from port1 to port2.

      Fig. 11 VSWR is ~1.2 at the maximum radiation frequency of 40 GHz

      VSWR is the function of reflection-coefficient and it defines the power reflected from antenna. VSWR = 1.2 and corresponding reflection coefficient can be calculated as 0.09. The reflection coefficient in terms of voltage represents how much power is being reflected.

      Fig. 12 Stimulated power 0.5W, power accepted at all ports by the antennas is 0.4815 W.

      The reflection loss is below -8db as shown in fig. 12. At the frequency below cutoff, mixed response of the feeding structure of the waveguide section is obtained. This is mainly due to the distortions to the field pattern.

   3. Modelling of Antennas on the substrate with Tantalum as obstacle material.

   Tantalum is a capacitor material hence changes that occurs in the presence of capacitor material are observed.

   Fig. 13 Antennas on substrate with tantalum

   Fig. 14 Simulated S-parameter shows dip at 40 GHz

   The simulated S-parameter for antenna array is plotted for 45GHz. S11 defined as a reflection coefficient, whereas S21 is transmission coefficient. They are majorly used to calculate the gain of an antenna. S21 represents the power transmitted from port1 to port2.

   Fig. 15 VSWR is ~1.2 at the maximum radiation frequency of 40 GHz

   Fig. 16 Stimulated power 0.5W, power accepted at all port by the antennas is 0.4852 W

   Here almost same power is transmitted by all the ports. From the reflection coefficient there is energy loss during propagation at that frequency. The power graph shows that simulated power is

   0.5 W and the power accepted at the port is 0.485W. The loss in metal and dielectric is almost negligible.

   A comparison table of various configuration of wireless connectivity with different materials and obstacles are shown in Table 2.

   Table 2: Comparison of S-parameters and VSWR

   S. No.	S-para meters	Antenna with no obstacles	Antenna with tantalum	Antenna with aluminium
   1	S11	-18.1769	-20.2799	-18.2659
   2	S22	-18.0821	-19.5011	-18.7201
   3	S33	-17.1082	-22.3481	-20.6731
   4	S44	-17.4836	-21.4190	-18.9889
   5	VSWR	<=1.2	<=1.2	=1.2

6. CONCLUSION AND FUTURE WORK

In this work, the analysis for short range wireless communication for chip scale is presented. Pertaining to the objectives, Vivaldi antenna is used to achieve wireless communication, while implementing the substrate and also comparing the impact of other obstacles with different materials on the substrate. This is done for Giga hertz communication. A study of Vivaldi antenna for different obstacle materials like aluminium and tantalum is done by keeping the aim of short- range wireless communication. In future, the research can be continued by selecting different antenna and obstacle materials and investigate new materials. Novel techniques for the manufacturing of these materials could also be investigated.

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