 Open Access
 Total Downloads : 533
 Authors : G. Jaya Laxmi, J.V.G. Rama Rao
 Paper ID : IJERTV2IS111032
 Volume & Issue : Volume 02, Issue 11 (November 2013)
 Published (First Online): 04122013
 ISSN (Online) : 22780181
 Publisher Name : IJERT
 License: This work is licensed under a Creative Commons Attribution 4.0 International License
Multi Switching Techniques of Z Source Inverter based PMSM Drive
G. Jaya Laxmi, Dept of Electrical and Electronics Engineering, B.V.C Engineering College, Odalarevu.

Rama Rao, Dept of Electrical and Electronics Engineering, B.V.C Engineering College, Odalarevu.
Abstract:
This paper presents a modelling of permanent Magnet synchronous motor with ZSource inverter, switched inductor (SL) ZSource Inverter and switched capacitor (SC)ZSource Inverter. Compared with classical ZSI, the proposed inverters (SLZSI and SCZSI) increases the voltage boost inversion ability and also very short through zero state is required to obtain high voltage conversion ratios and modified vector controlled scheme of the PMSM drive is developed by considering DClink voltage boosting in order to reduces line harmonics, improves power factor and reliability, and extends output voltage range. Several simulation results obtained to verify the feasibility and effectiveness of the proposed system.

INTRODUCTION
HIGHPERFORMANCE voltage and currentsource inverters (VSI and CSI) are widely required in various industrial applications such as servomotor drives, special power supplies, distributed power systems, and hybrid electric vehicles. However, the traditional VSI and CSI have been seriously restricted due to their narrow obtainable output voltage range, shootthrough problems caused by misgating and some other theoretical difficulties due to their bridgetype structures. The topology of the Z source inverter [3] was proposed to overcome the problems in the traditional inverters in which the functions of the traditional dcdc boost converter and the bridgetype inverter have been successfully combined. As shown in Fig. 1, the impedance network of the Zsource inverter consists of split inductors L1 and L2 and capacitors C1and C2 connected in Xshape. An extra shootthrough zero state of the top and bottom arms is thus introduced into the switching actions, and results in a boost factor B, by which the conversion
Fig1 ZSource inverter
From (1), it is seen that D is limited to the range from minimum value zero to the maximum value 0.5 in which the impendence network can perform the stepup dcdc conversion from Vin to Vdc. For the practical applications, in order to provide a very high boost factor for the lowvoltage dc energy source, usually a large value of D needs to be taken, i.e., the Zsource converter would have to be operated under the extreme condition of a long interval of the shootthrough zero state. Here, we take
the classical synchronized pulse width modulation (SPWM) control strategy as the example for the brief discussion on the output power quality, and consequently, the modulation index of the main circuit M will be decreased to a very low level, and the numerical relation can be expressed by
M 1 D (2)
Where
M= (Amplitude of the modulation waveform/Amplitude of the carrier waveform)
Unfortunately, the constraint of low M and high D will cause a new conflict of the output power quality and system boost inversion ability. M has a linear relation to the magnitude of the output voltage at the fundamental frequency. Beside M, the modulation ratio p, defined as the ratio of the carrier frequency over the modulation frequency, is also related to the power quality. The harmonics usually appear in clusters with main components at frequencies of np (n = 1, 2, 3, . . .). Therefore, on performing the harmonics computation by Fourier series, we can draw the harmonics spectra as shown in Fig. 2 for a qualitative observation.
Fig:2 Normalized harmonic amplitudes for SPWM Zsource inverters.
According to the results in Fig. 2, the condition of low M will result in a poor inversion ability at the fundamental frequency with high total harmonic distortion values, and consequently, the final ac output performance will be degraded significantly. For an optimum system design of the Zsource inverter, the practical values of M have to be made close to 1, and D has a small upper limit according to (2). Therefore, the practical boost factor of Zsource impedance network is usually restricted seriously by (1). With the fast development of modern technologies, the aforementioned disadvantage might be obvious and will limit the further applications of the Zsource inverter in some areas that require the strong boost inversion abilities
for lowvoltage energy sources such as fuel cells, batteries, and photovoltaic systems [6].
In recent years, advanced dcdc conversion enhancement techniques such as switched capacitor (SC), switched inductor (SL), hybrid SC/SL, voltage multiplier cells and voltage lift techniques have been greatly explored [12][19], which are used to get the high stepup capacity in transformer less and cascade structures. The main objective is to reach a high efficiency, high power density, and simple structures. Therefore, the combination with the Zsource inverter and advanced dcdc enhancement techniques could be a good solution for improving impedance type inverters performance and promoting their further industrial applications. It is necessary for the drive system of EV to have wide operation range that is from stand still to high speed running. Although motors with different structures have been used to propel the vehicles, the permanent magnet synchronous motors (PMSM) have become more and more attractive because of their high efficiency, high power density, and high reliability [12]. However, these motors inherently have a short constantpower region due to their rather limited field weakening capability. In order to increase the speed range, two main control schemes have been discussed in past works. The most popular one is the field weakening control in the highspeed region [1], but it needs additional current to reduce the magnet flux of the motor. The other one is a DClink voltage control method. In references [3][4], PMSM drive system with a boost converter in series with the PWM inverter to change the DClink voltage above the rated speed has been discussed.
However, this twostage system increases not only the complexity of circuitry and control but also the cost and the space requirement. Meanwhile there are several defects in the traditional voltage source inverter.
In this paper, a complete PMSM drive system with bidirectional ZSI, SLZSI and SCZSI has been proposed. Then, the steady state operating principle of ZSource inverter ,switched inductor(SL)ZSource Inverter and switched capacitor (SC)ZSource Inverter, the voltage boosting control scheme and modified vector controlled scheme for the PMSM drives are presented. Comparing the speed torque results to obtain a effective technique to reduce the line harmonics increase the boosting factor and modulation ratio.
In this paper, the concept of the SL and SC techniques has been integrated into the classical Z source impedance network, and consequently, a new SL and SC Zsource impedance network with PMSM is proposed. The newly obtained topology is then termed the SL Zsource inverter and the SC Zsource inverters are shown in Fig. 3 and Fig 4 respectively. This topology is totally different from any other existing Zsource inverters from the viewpoint of
circuit structures and operation principles. The main characteristics are summarized in the following.

The basic Xshape structure is retained.

As for the high power quality and high boost inversion ability, their conflict caused byM and D has got an initial solution.

Only six diodes and two iductors are added compared to the classical Zsource inverter.
All reference directions of currents and voltages can be referred to in the corresponding figures. For any component X, its instantaneous current and voltage are expressed as iX and vX . Its average current and voltage during a switching cycle in the steady state are expressed as IX and VX . The corresponding peak value is represented by the small letter with a hat symbol.
Fig3: Topology of proposed SL ZSource Inverter
Fig4: Topology of proposed SC ZSource Inverter


ZSI WITH PMSM DRIVE

Principle of operation:
Fig.4 shows the configuration of the proposed drive system, which consists of a battery pack, an impedance network, a conventional voltage source inverter and a PMSM. The impedance network consists of two identical inductors and two identical capacitors connected in a specific manner to achieve the desired properties. The additional switch S7 is installed anti parallel to the input diode to eliminate the undesirable operation modes caused by inductor current discontinuous, and enables the system have the ability of bidirectional power flow.
Zsource inverter can be operated in two modes, one is shoot through mode and another one is nonshoot through mode. the basic difference between VSI and ZSI is VSI has only 8 switching states where as in ZSI has 9 switching states. Fig. 2 shows the equivalent circuit of the Zsource inverter shown in Fig. 1 when viewed from the dc link. The inverter bridge is equivalent to a short circuit when the inverter bridge is in the shootthrough zero state, as shown in Fig. 3, whereas the inverter bridge becomes an equivalent current source as shown in Fig.4 when in one of the six active states. Note that the inverter bridge can be also represented by a current source

Circuit analysis :
Assuming that the inductors L1 and L2 capacitors C1and C2 have the same inductance and capacitance, respectively, the Zsource network becomes symmetrical. From the symmetry and the equivalent circuits, we have
VC1=VC2=VC; VL1=VL2=VL
Given that the inverter bridge is in the shootthrough zero state for an interval TO , during a switching cycle T, and from the equivalent circuit, Fig. 6, one has
vl= vc Vd=2 vc Vi=0
Now consider that the inverter bridge is in one of the eight nonshoot through states for an interval of T1, during the switching cycle, T . From the equivalent circuit, Fig.7, one has
VL=V0VC ; Vd=V0; Vi=VCVL=2VCV0
The average voltage of the inductor over one switching period is zero.then,we have
with zero value (i.e., an open circuit) when it is in one of the two traditional zero states. Therefore, Fig.
4 shows the equivalent circuit of the Zsource inverter viewed from the dc link when the inverter
VL L
To .VC T1 (VO VC ) 0
T
V C T1
bridge is in one of the eight nonshoot through switching states.
VO T1 To
Fig5Equivalent circuit of the Zsource inverter viewed from the dc link.
In shoot through state
Fig.6. Equivalent circuit of the Zsource inverter viewed from the dc link when the inverter bridge is in one of the eight shoot through switching states Vdc
Fig.7. Equivalent circuit of the Zsource inverter viewed from the dc link when the inverter bridge is in one of the eight nonshoot through switching states.
Where Do is the shoot through time duty ratio And B is the boosting factor Vin is the source voltage Vdc is peak DC link voltage across the inverter bridge


SLZSI WITH PMSM DRIVE

Principle of operation:
The proposed SL Zsource inverter consists of four inductors (L1, L2, L3 , and L4 ), two capacitors (C1 and C2 ), and six diodes (D1,D2,D3,D4,D5 , and D6 ). The combination of L1L3D1D3D5 and the combination of L2L4 D2D4D6 performs the function of the top SL cell and the bottom SL cell, respectively. Both of these two SL cells are used to store and transfer the energy from the capacitors to the dc bus under the switching action of the main circuit.
Fig8 SL ZSI with PMSM Drive

Operation Principles
From the viewpoint of the switching states of the main circuit connected with SL impedance network, the operation principles of the proposed impedance network are similar to those of the classical Zsource impedance network. For the convenience of analysis, the equivalent circuit of the proposed impedance network viewed from the dc bus is shown in Fig. 4 in which a virtual active switch S and a passive switch Do are introduced to simulate the practical shootthrough actions of the top and bottom arms. Therefore, the substates of the proposed impedance network are classified into the shoot through state and the nonshoot through state, respectively.
fi g:9 Equivalent circuits. (a) Shootthrough zero state (i.e., switching ON). (b) Nonshootthrough states (i.e., switching OFF).

Shoot through state
During this sub state, S is ON, while both Din and Do are OFF. For the top SL cell, D1 and D2 are ON, and D3 is OFF. L1 and L3 are charged by C1 in parallel. For the bottom SL cell, D4 and D5 are ON, and D6 is OFF. L2and L4 are charged by C2 in parallel. This state corresponds to the additional zero
For the convenience of mathematical derivation, all inductors and capacitors are assumed to have the same inductance (L) and capacitance (C), respectively; therefore, both the equivalent circuits in Fig. 5 show the symmetry characteristics. In addition, since C1 and C2 are sufficiently large, thus, in the steady state, we have
VC1 = VC2 = VC . (3)
The inductor current iL1 increases during switching ON and decreases during switching OFF. During switching ON, the corresponding voltage across L1, VL1ON is equal to VC . Applying the voltsecond balance principle to L1, we can get the corresponding voltage across L1 during switching OFF, VL1OFF, which is expressed by
VL1OFF = (D(1 D))VC = VL3OFF
The inductor current iL3 increases during switching ON and decreases during switching OFF. The corresponding voltages across L3 are equal to VC1 and (VC2 Vin + VL1OFF).
Applying the voltsecond balance principle to L3, we have
DTVC1 = (1 D)T(VC2 Vin+VL1OFF) or
DTVin = (1 D)T(VC Vin (D/1 D)VC)
Hence,
VC =(1 D/1 3D)Vin = VC1 = VC2 .
During switching OFF, C1, L1, L3, and the voltage source Vdc form a close loop; therefore we have
VC = Vdc+VL1OFF + VL3OFF.
Therefore, averaging vL over a switching period to zero then gives rise to the following governing expressions for the capacitor voltage Vc, peak dclink voltage vi , and peak ac output voltage vac, in terms of the source voltage Vdc:
state produced by the shootthrough actions of the top and bottom arms, and its equivalent circuit is shown in Fig. 5(a). It is seen that both the top and bottom SL cells perform the same function to absorb the energy
VC
1 dST
1 3dST
1 dST
Vdc
stored in the capacitor
i
1 3dST
Vdc

NonShootThrough State:
M (1 d ) V
ac ST dc
This state corresponds to the six active states and two zero states of the main circuit and the equivalent circuit is shown in Fig. 5(b). During this substate, S is OFF, while both Din and Do are ON. For the top SL cell, D1 and D3 are OFF, and D5 is ON. L1 and L2 are connected in series, and the stored energy is transferred to the main circuit. For the bottom SL cell,D4 andD5 are OFF, andD5 is ON. L3 and L4 are connected in series, and the stored energy is transferred to the main circuit. At the same moment, to supplement the consumed energy of C1 and C2 during the shootthrough state, C1 is charged by Vin via the bottom SL cell, and C2 is charged


Circuit analysis of SL ZSource impedance
1 3dST 2
where M 1.15 and dST < 1/3 rpresent the VSI modulation ratio after adding triplen offset and normalized shoot through time per switching period, respectively. The boost ratio B can then be written as B = (1 + dST)/(13dST), which is larger than B = 1/(1
2dST) of the traditional Zsource inverter.


SCZSI WITH PMSM DRIVE
The proposed SC Zsource inverter consists of four capacitors (C1, C2, C3 , and C4 ), two inductors (L1 and L2 ), and six diodes (D1,D2,D3,D4,D5 , and D6 ). The combination of C1C3D1D3D5 and the combination of C2C4 D2D4D6 performs the function of the top SC cell and the bottom SC cell, respectively. Both of these
two SC cells are used to store and transfer the energy
1 dOC
from the capacitors to the dc bus under the switching action of the main circuit
i i
1 3dOC
Idc
I ac
M (1 dOC ) Idc
1 3dOC 2
where M 1.15 and dOC < 1/3 represent the CSI modulation ratio and normalized opencircuit duration per switching period, respectively. The computed current boost factor of B= (1 +dOC)/(1 3dOC) is again larger than that of B= 1/(12dOC) of the traditional currenttype Zsource inverter
Fig10 SCZSI with PMSM Drive
The resulting SC topology can still assume two distinct states, whose operating features and expressions are written as follows:

Open Circuit:
Fig11 shoot through state
Introduced by turning OFF all switches of the CSI bridge, causing diodes D, D3 And D3 to conduct naturally on the contrary, diodes D1, D2, D1, and D2 block naturally. The resulting circuit consists of two seriesconnected capacitors per SC cell with their currents indicated as
iC = iC1 = iC1 = iC2 = iC2 = IL1 =IL2 = IL .

Non open Circuit:
Fig11 NonShoot through
Averaging the capacitive current to zero per switching cycle then results in the following equations for relating the network inductive current IL , peak dclink current i , and peak ac output current ac with the input current Idc:


COMPARISION OF ZSI WITH PROPOSED
TECHNIQUES
The current stresses of the impedancetype power converters are different under different control and load conditions. For the purpose of comparison, both the proposed inverter and the classical Zsource inverter are represented by the simplified equivalent circuit as shown in Fig. Different from Fig. 4, an inductive load impedance (Zl=Rl+ sLl ) is paralleled with S directly in As for the proposed inverter, the inductor currents IL1
TABLE I: STRESS COMPARISON IN THE CASE OF THE SAME D AND Vin
SL Topology
Classical Zsource inverter
Vdc
1 D V
1 3D dc
1 V
1 2D in
Vc
1 DV
1 D dc
(1 D)Vdc
Voc
Vdc
Vdc
Ioc
2IL I1
2IL I1
I1
(1 D) V dc
R1
(1 D) V dc
R1
IL
(1 D)2 V
dc
1 3D R1
(1 D)2 V
dc
1 2D R1
TABLE II: STRESS COMPARISON IN THE CASE OF THE SAME D AND Vin
IL
1 dOC
1 3dOC
Idc
IL4 are the same and can be expressed by IL for the convenience of analysis. The tedious computation is thus avoided.
Applying the steadystate analysis method i to Fig. 1 we can obtain the voltage and current stresses of the main components (passive power switch Din , L, C, and dc link) and tabulated them in Table I. The results in Table I are based on the assumption that both of these two inverters are working in the case of the same D and Vin. Consequently, it can be known that the proposed inverter has the higher voltage and current stresses due to its stronger voltage boost ability. When the proposed inverter is used to replace the classical Z source inverter in a particular case, Vdc and Vin are usually fixed. If we assume that the detailed value of D in the classical Zsource inverter is k, the corresponding D in the proposed inverter should be k/(2 k) so as to obtain the same Vdc. Correspondingly, the voltage and current stresses are tabulated in Table III.
TABLE III: STRESS COMPARISON IN THE CASE OF THE SAME D AND Vin
It is seen from Table III that the voltage stresses of the proposed inverter are the same to those of the classical Zsource inverter. The current stresses have a rise for the same load impedance, which indicates that the proposed inverter has a stronger power processing capability. If the condition of the same load currents is considered, the current stresses of these two topologies will be the same.
Boost ability comparison of the classical Zsource impedance network and the proposed SL Zsource impedance network
TABLE IV: COMPARISION OF SL & SC TOPOLOGY

PMSM DRIVE SYSTEM
For a PMSM, the steady state voltage equation in the rotor reference frame is
sd R pLd
e Lq
isd 0
L R pL i
sq
e d q sq
e pm
where vsd , vsq , isd and isq are d and qaxis voltages and currents respectively, R , Ld , and Lq are motor armature resistance, d and qaxis inductances respectively, and e and pm are electrical angular frequency and PM flux linkage respectively. In practice, considering the motor maximum line current amplitude and maximum available voltage, one can form the following constraints
i2 i2 i2
these figures is Peak dclink voltages of the SL inverters are higher. Zsource inverter, while not overstressing any of its components. Similar observations would be applicable to the generalized SC inverter even though its comparison with other techniques is not possible because of either nonexistent or different operating principles.
Simulations were next repeated for all the 3 inverters to produce a graph for efficiency comparison.
sd sq s max
2 2 2
sd sq s max
Substituting above equations, the derivative operator becomes zero in the steady state, and neglecting the armature resistance drop for highspeed operation, one can obtain an equivalent voltage constraint as
q sd d sq pm s max e
q sd d sq pm s max e
(L i )2 (L i )2 2 / 2
Generally, as the DClink voltage of inverter keeps constant, will also keep constant. As is larger than the rated speed of motor, a field weakening strategy should be used to provide the motor a high speed operation as the constant is used. However, the corresponding current amplitude will increase such that the copper loss will increase.
a. Parks Transformation and Dynamic d q Modelling
The dynamic d q modelling is used for the study of motor during transient and steady state. It is done by converting the three phase voltages an currents to dqo variables by using Parks transformation Converting the phase voltages variables vabc to vdqo variables in rotor reference frame the following equations are obtained
q
q
a
a
V cos cos( 120) cos( 120) V
2 r r r
Relevant parameters read from datasheets and websites (Magnetics Inc., BHC Aerovox Ltd., Infineon Technologies AG, and International Rectifiers) and used for the loss computation were tabulated in Table II with some clarifications provided as follows:

topological parameters of the inverters were still kept as
NCas=N + 1=TL+1=TZ = 3;

inductors of the 3 inverters were wound with the same total number of turns to give roughly the same combined (magnetizing) inductance;

lower rated capacitors were used for the alternate cascaded inverter. Depending on how much cheaper the lower rated capcitors can be, their capacitances can be increased appropriately if needed (higher capacitance has lower equivalent series resistance);

losses of insulated gate bipolar transistors in the inverter bridge were obtained through simulation based on the method introduced in
The obtained plots are shown in Fig. 1315, where it can be seen that efficiencies at higher gain with the generalized SL inverter have the highest and the transZsource inverter having the lowest efficiency. The reason is likely due to the higher stresses tolerated by the latter, which can cause higher semiconductor switching losses and other resistive losses.
Vd 3 sinr sin(r 120) sin(r 120) Vb
V 1 1 1
V
o
2 2 2
c
Convert Vdqo to Vabc
Va cosr
sinr 1 Vq
V cos( 120) sin( 120) 1 V
b r r
d
Vc
cos(r 120) sin(r 120) 1 Vo


SIMULATION AND EXPERIMENTAL VERIFICATION
Simulations in MATLAB/Simulink were next performed for classical, Voltage type SL, current type SC Zsource inverters. Input voltage to each inverter was set to 100V for eventually powering a Permanent Magnet Synchronous Motor Drive. The same control parameters of dST=0.15 and M
=0.8Ã—1.15 were used for all four cases with their
results shown from Fig. . Observations noted from
Fig13: OUTPUT FOR PMSM USING CLASSICAL Z_SOURCE INVERTER
Fig14: OUTPUT FOR PMSM USING SC Z_SOURCE INVERTER
F Fig15: OUTPUT FOR PMSM USING SL Z_SOURCE INVERTER

EXPERIMENTAL RESULTS Experiments were first performed with the classical ZSource inverter and compared with generalized SL Zsource inverter and SCZSource inverter shown in Fig.13 to 15. In total, four generic cells with six 3 mH inductors and two 2200F capacitors in SLZSI and two 3mH inductors and six 2200F capacitors in SCZSI were used. The cells were inserted equally to the upper and lower dc rails, giving N = 2 and a computed boost factor of 3.25 according to (3) and a shootthrough duration of dST=0.15. The inverter was supplied from a 100V dc source, and was connected to a PMSM Drive. Corresponding experimental waveforms are shown in Figs. 15 and 16 for a modulation ratio of M = 0.85×1.15 (1.15 introduced by the triplen offsets). Fig. 15 shows a dclink voltage that switches between 0 and 300V, representing shoot through and non shootthrough states, respectively. The measured boost factor is thus 3, which is slightly lower than the computed value of
3.25 due to switching and component parasitic.
With comparing these dclink voltages of ZSI, SLZSI and SCZSI is shown in fig 16.comparing with zsi peak dc link voltages in SLZSI and SCZSI the peak dc link voltages are ripple free. the measured ac peak current is 3 A, which again matches well with the computed value 0, where Z Load is the load impedance.

CONCLUSION
To understand the elementary SL topology, the generalized SL and SC Zsource inverters are derived. Their operating principles are explained with their gains proven to be much higher than those of the traditional Zsource inverters. Their modulation ratios can be set higher to better utilize their dc links, and to keep their component stresses lower. Simulations have confirmed these advantages, and experiments have verified the inverter practicalities.

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