 Open Access
 Total Downloads : 643
 Authors : Uma Shankar Patel, Dhaneshwari Sahu, Amit Gupta
 Paper ID : IJERTV2IS80358
 Volume & Issue : Volume 02, Issue 08 (August 2013)
 Published (First Online): 17082013
 ISSN (Online) : 22780181
 Publisher Name : IJERT
 License: This work is licensed under a Creative Commons Attribution 4.0 International License
Minimization of THD Using A 5Level ThreePhase Cascaded Hybrid Multilevel Inverter
Uma Shankar Patel 1 Dhaneshwari Sahu 2 Amit Gupta 3
ME Scholar* Power Electronics, AsstProf. Electrical Engg Dept., Asst Prof. ET&T Dept.
RITEE, Raipur (C.G.) RITEE, Raipur (C.G.) RITEE, Raipur (C.G.)
Abstract
The Multilevel Inverter topology gives the advantages of usage in high power and high voltage application with reduced harmonic distortion without a transformer. This paper shows 5level Cascaded H bridge multilevel inverter minimizing the total harmonic distortion. Variation of angles with modulation index is observed and THD is calculated for selected modulation indexes and all attempts are made so as to get lowest THD. Results are simulated in PSIM environment.
Index Terms Cascaded Hbridge multilevel inverter, THD, Switching angle, PSIM
I INTRODUTION
The increase of the world energy demand has entailed the investment of huge amounts of resources, economical and human, to develop new technologies capable to produce, transmit and convert all needed electric power. In addition, the dependence on fossil fuels and the progressive increase of its cost lead to appearance of new cheaper and cleaner energy resources not related to fossil fuels. In ultimate decades, renewable energy resources have been the focus for researchers, and different families of power converters have been designed to integrate these types of supplies into the distribution grid.
Therefore, power electronic converters have the responsibility to carry out these tasks with high efficiency. At each of these stages rapid development of the power electronic lead to implementation of new power converter topologies and semiconductor technologies. A continuous race to develop higher voltage and highercurrent power semiconductors to drive highpower systems still goes on. In this way, the lastgeneration devices are suitable to support high voltages and currents (around 6.5 kV and 2.5 kA). However, currently there is tough competition between the use of classic power converter topologies using highvoltage semiconductors and new converter topologies using mediumvoltage devices. These two concepts are shown in Fig. 1.1, where multilevel converters built using mature mediumpower semiconductors are competing with classic power
converters using highpower semiconductors that are under continuous development and not mature. Indeed, multilevel converters using more switching components can be both cheaper and more reliable than standard
twolevel solution with rare and more expensive components. In addition, multilevel solution requires smaller filter to satisfy power quality requirements, which can be significant item in highpower range. Nowadays, multilevel converters are a good solution for power applications because they can achieve high power using mature mediumpower semiconductor technology , covering power range from 1 MW to 30 MW.
Fig 11 Classic twolevel versus common multilevel power converters
Moreover, multilevel converters present several other advantages:

Generate better output waveforms with a lower dv/dt than the standard converters (power quality).

Increase the power quality due to the great number of levels of the output voltage: in this way, the AC side filter can be reduced, decreasing its costs and losses (low switching
losses).

Can operate with a lower switching frequency than twolevel converters, so the electromagnetic emissions they generate are weaker, making less severe to comply with the standards (EMC).
Can be directly connected to high voltage sources without using transformers; this means a reduction of implementation and costs.
The main disadvantages of this technique are:

Larger number of semiconductor switches required increasing complexity compared to the two level solution.

Capacitor banks or insulated sources are required to create the dc voltage steps.


Multilevel converters are a viable solution to increase the power with a relatively low stress on the components and with simple control systems. The increase of maximum output voltage and number of levels is shown in Fig 1.1. for two, three and four level inverter with equal dc voltages applied to three phase starconnected load. To some extent, the structure was born from the previous idea of series switch connection, with a significant modification that voltages across the switches need to be determined (fixed). This concept can be clearly seen for the simplest diode clamped multilevel inverter shown in Fig. 320 (a). Capacitor voltages can be fixed in a simple manner by connection of separate dc sources. If numerous isolated sources are not easily available, the dc bus voltage is split in several equal steps respectively by capacitor banks which need to be held equal by closedloop control. It should be noted that before the introduction of the multilevel inverters highpower converters were typically realized by current source inverters, increasing the current ratings instead of voltage.
II TYPES OF MULTILEVEL INVERTER
The most common multilevel converter topologies are:

Diode clamped

Flying capacitor

Cascade Topology
In addition, numerous topologies exist, derived by these basic types by varying or cascading them. In should be emphasized that in general all types of multilevel converters can produce the same voltage output, but with significant difference in number of
switches, there topology, average voltage
/current,complexity control etc.

DIODE CLAMPED MULTILEVEL INVERTER
The main concept of this inverter is to use diodes to limit the power devices voltage stress. The voltage over each capacitor and each switch is Vdc. An n level inverter needs (n1) voltage sources, 2(n1) switching devices and (n1) (n2) diodes. 5level diode clamped multilevel inverter.
In a 5level diode clamped multilevel:
n=5 , Therefore:
Number of switches=2(n1) =8 Number of diodes= (n1) (n2) =12 Number of capacitors= (n1) =4
A 5level diode clamped multilevel inverter is shown in Fig. 320. Switching states are shown in Table.1. For example to have Vdc/2 in the output, switches S1 to S4 should conduct at the same time. For each voltage level four switches should conduct. As it can be seen in Table.1 the maximum output voltage in the output is half of the DC source. It is a drawback of the diode clamped multilevel inverter. This problem can be solved by using a two times voltage source or cascading two diode clamped multilevel inverters.
Fig.2.1 5 Level Diode Clamped Multilevel inverter

FLYING CAPACITOR MULTILEVEL INVERTERS
This inverter uses capacitors to limit the voltage of the power devices. The configuration of the flying capacitor multilevel inverter is like a diode clamped multilevel inverter except that capacitors are used to divide the input DC voltage. The voltage over each capacitor and each switch is Vdc.
5level flying capacitor multilevel inverter
n=5, Therefore: Number of switches=8
Number of capacitors= 10
Fig.2.2 shows a five level flying capacitor multilevel inverter. The switching states in this inverter are like in the diode clamped multilevel inverter. It means that for each output voltage level 4 switches should be on.
Fig 2.2 level Flying Capacitor Multilevel inverter

CASCADED HBRIDGE MULTILEVEL INVERTER

CONCLUSION
The implementation in a cascaded multilevel inverter shows a simple way to get the desired output voltage with minimum THD and low switching losses. PSIM is used for implement this model.
This paper can be extended further by increasing the number of levels in multilevel inverter then we improve efficiency and reduce switching losses and THD also.

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The concept of this inverter is based on connecting Hbridge inverters in series to get a sinusoidal voltage output. The output voltage is the sum of the voltage that is generated by each cell. The number of output voltage levels are 2n+1, where n is the number of cells. The switching angles can be
chosen in such a way that the total harmonic distortion is minimized. One of the advantages of this type of multilevel inverter is that it needs less number of components comparative to the Diode clamped or the flying capacitor, so the price and the weight of the inverter is less than that of the two former types.
5level Cascaded Hbridge multilevel inverter
The output voltage of this inverter has 5 levels like in the previous multilevel inverters. This inverter consists of two Hbridge inverters that are cascaded. For a 5 level cascaded Hbridge multilevel inverter 8 switching devices are needed.
Fig 2.3 Cascaded H bridge Multilevel inverter
The DCDC converter output is fed to a Multilevel inverter where it gives 3 level output then it fed to Full bridge inverter which invert the positive 3 level output of Multilevel inverter for a negative cycle and make it a
5 level ac output .Filter is designed and connected across load of a full bridge inverter in order to reduce the dc content in output and to make the output voltage more sinusoidal. The simulation model of the inverter is shown in fig. The simulation parameters are tabulated in Table 1 The inverter output voltage is shown in Fig. 2.5
Fig. 2.4 5 level Multilevel Inverter with 8 switches
Table 1 Switching Pattern of Proposed Multilevel Inverter
Fig. 2.5 Shows Five level Output of Multilevel Inverter
III PROPOSED TOPOLOGY OF MULTILEVEL INVERTER
Fig 3.1PSIM Model of Grid Connected Components
Fig 3.2 Gate pulse switching pattern for Multilevel inverter
Fig 3.3 Output Voltage Waveform
Fig 3.4 PI Controller Output Waveform
Fig 3.5 Closed loop Switching in Full Converter
Table 2Inverter Simulation Parameter
Parameters 
Specification 
R 
15 
L 
600mH 
CA,CB 
470ÂµF 
ma 
0.9 
It can be observed from fig. that the output voltage of the inverter varies between +Vdc /2 and Vdc/2 wherein the frequency of the fundamental component is same as that of Vcontrol
R.SALUTARIAND G.SCIUTTO, A new multilevel pwm method: a theoreticalanalysis, IEEE Transactions on Power Electronics, vol. 7, no. 3, july1992, pp.497505.