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- Authors : Radhika , Veeralakshmi , B. Amala
- Paper ID : IJERTCONV3IS04037
- Volume & Issue : NCRTET – 2015 (Volume 3 – Issue 04)
- Published (First Online): 30-07-2018
- ISSN (Online) : 2278-0181
- Publisher Name : IJERT
- License: This work is licensed under a Creative Commons Attribution 4.0 International License
Enhanced Transmission Encoding in Railway Track Circuit Using Kasami Code
Radhika and Veeralakshmi
Star Lion College Of Engg &Tech,SLCET Manankorai,Thanjavur
B. Amala, AP/ECE
Star Lion College Of Engg &Tech,SLCET Manankorai,Thanjavur
Abstract — The current stage of railway transportation systems must deal with increased safety
and reliability issues. An improving occupancy track Circuit performance and providing them with redundancy, higher noise immunity, and the capability
to acquire additional information about the track section involved. This work proposes a novel track circuit based on the encoding of the electrical transmissions with Kasami codes. Track circuit emitters send signals coded with a known sequence that can be identified by the corresponding receivers using correlation techniques, these processes increase immunity to noise and changes in environmental conditions. This system to provides reliable safety in high speed trains like bullet trains etc., and provide higher frequency range in sectional railway tracking. An appropriate selection of orthogonal sequences for encoding, as well as different carrier frequencies for transmissions, allow simultaneous emissions and receptions without cross interference.
Keywords Field-programmable gate array (FPGA) imple- mentation, Kasami code-division multiaccess, rail track circuit, railway traffic control.
In railway transportation, specific track circuits are used to guarantee that a specific track section is free for circulation of railway vehicles. Common track circuits consist of two signaling subsystems physically placed at two certain points of the rail track delimiting then a track section; most of the track circuits have an electrical emitter at one end and an electrical receiver at the other one. Whether a railway vehicle is inside a certain track section, their axles will electrically connect both rails, which will avoid any emitted signal to reach the receiver end; this fact is somehow detected by the track circuit, which will classify this section as occupied.
Each track section is isolated from adjoining sections by using electrical filters or isolation sections to avoid signal propagation among different track sections.
Encoded track circuits were initially proposed in . Furthermore, the extended use of electrical trains, together with the current control technologies of electrical engines, has forced an evolution in the research and design of track circuits. This evolution has several guidelines to deal with noisy environments, to
improve reliability under perturbations, and to simplify maintenance operations . The main differences among proposals for track circuits can be found in how to identify the presence of a vehicle in a certain section, the type of transmitted signals, and the way the measuring circuit is coupled to the railway tracks. In some of them , , train presence is basically detected by comparing the received signal amplitude with a certain threshold. The transmitted signals are captured and then analyzed to determine the train position since the closer the train, the lower the received amplitude at the measuring system.
Sometimes, the correlation with the transmitted signal is searched to increase confidence in the detection. This technique requires accurately knowing the system global parameters (tracks, coupling elements, junctions, etc.) furthermore, this system must be periodically calibrated since empty-track features can change according to the state of tracks, weather conditions, etc. .Other systems encode the emitted signal, so the receiver can correlate the reception with this code and compare its value with a determined threshold , . This encoding should be immune to any system noise source including Gaussian, impulsive, and burst noise, as well as more significant interferences coming from frequency components in traction return currents .
Furthermore, the root mean square (RMS) voltage of signals measured in the track can be analyzed, therefore, if the RMS is high but the correlation value is low, there is an error in the measurement. Some other solutions use sinusoidal tones coupled to tracks with circuits tuned at specific frequencies to discriminate among different emitters and receivers. These are complex methods since the tuning process has to include track param-eters, which are often a function of the track state (rails and ballast), weather, and other environmental conditions . Summing up, all these track circuits require huge equipment for the necessary analog filtering and modulations, all of which can have drifts. In addition, coupling to the track requires laborious adjustment, which implies additional constraints in time and cost, and will affect system robustness against variations in both environmental conditions andlong-
term degradation of components.
This work proposes a new encoding scheme for the electrical links between emitters and
receivers of a railway track circuit. The encoding is based on Kasami codes , and therefore, several emitters and receivers can operate at the same time without cross interference. correlation techniques provides higher immunity to noise and guarantee system operation even under adverse environmental conditions.
PROPOSAL TRACK CIRCUIT
The proposal for the track circuit is based on the simultaneous use of frequency-division multiple access and code division multiple access techniques. Both emitters (Ei) and receivers (Ri) are placed in locations that separate the different track sections to be monitored. Every emitter Ei and receiver Ri is coupled to track using a soft-tuned passive circuit to separate traction current components. Fig. 1
Every emitter Ei transmits through the railway a signal that consists of a binary code and binary shift phase keying (BPSK) modulated by a carrier frequency A or B. The selection of carrier frequencies A and B is configured in such a way that, if an emitter Ei uses A, then the next one Ei+1 will use B, and vice versa. The emission is transmitted in both directions, so it can be detected at any point of the track. The discrimination among different emissions is possible due to the encoding, as well as to the alternative carrier frequencies A and B. Let us define a node i in the railway as a set of an emitter Ei and a receiver Ri then, any pair of consecutive nodes will define a track section.
Every node i can work in two different modes (AorB), depending on the frequency used for the transmission. For instance, let us suppose that node i is in mode A then, its transmitting frequency is A, and their adjacent nodes (i1andi+1) must be fixed to modeB. Regarding the codes, every node i emits its own code i and searches at the reception stage for the codes coming from the next nodesi1and i+1(sent at B), as well as its own code I (sent at A) this last check is done for safety reasons to verify that node i itself is properly working. On the other hand, if node i were in mode B, emitter would transmit codeci at a frequency B, whereas the receiver would search for codes i1and i+1at A, and code i at B.The detection of a train in the track
circuit will be carried out by analyzing the amplitude of the correlation output in the reception stage. This amplitude can be processed by different alternatives of thresholds. Anyway, the shunt resistance presented by the train becomes an important factor when fixing a threshold for the detection of trains , . Fig. 2 shows how the value of the shunting resistance of a train deermines the corresponding correlation amplitude. The correlation outputs obtained at node i for the transmission coming from node i+1 are shown in Fig. 4 for the following values of the shunting resistance: 0.1, 1, 2, 3, 5, and 10. The system behavior has been simulated for a 1-km-long track circuit, with a train placed at 0.5 km from each node. As can be observed, the presence of a train with a shunting resistance below 5is provoked to not receive the transmissions between nodes. For higher resistances, the typical maximum values from the correlation function are not attenuated enough, which implies that the transmissions could be
detected by nodes. As can be observed in Fig. 1, the emission-and-reception system is directly coupled to the track by means of two LC resonant circuits. This coupling requires a low quality factor Q since bandwidth is necessary for encoding ransmissions (about 20% over the carrier frequency in the modulation).
Furthermore, this makes possible coupling of the signal emitted by a node i to the receiver in the same node i. This allows a node i to detect its own transmission and check the correct link from the processing module to the coupling point in the track. As the coupling is less dependent on the
resonance frequency and on the global bandwidth than other systems without encoded signals, it provides more reliability and availability. The proposal requires the detection of all the transmissions to consider the track as free, so any fault in the system implies a safe situation since some transmissions will be lost.
Finally, the proposal tries to improve previous track circuits, simplifying the coupling elements by enhancing the signal processing. Only the elements improved by the proposal are considered in the succeeding sections, and therefore, those elements common to any track circuit (overvoltage suppressors, protection against surges and transients, etc.) are not described.
NODE i-1 NODE i NODE i+1
ELECTRICAL ISOLATION ELECTRICAL ISOLATION
HARDWAREIMPLEMENTATION The development carried out is based on the
computing platform Nexys2 by Digilent Inc. for fast prototyping .. All the proposed processing has been implemented on the Xilinx XC3S1200E field- programmable gate array (FPGA, with an external clock frequency of fCLK=50 MHz) .
ADC CONTROL DAC CONTROL
BPF 9KHZ BPF 5KHZ BPSK MODULATOR
The external clock frequency fCL Kin the Nexys2 board  is 50 MHz. Nevertheless, to achieve the required frequencies , a new master clock signal offmclk=45 MHz has been synthesized by means of the digital clock manager provided by the FPGA . Starting from this value, the required enabling signals
have been generated at the corresponding frequencies.
B (CARRIER 9KHZ) A (CARRIER 5KHZ)
TRIPPLE TRIPPLE CORRELATION
KASAMI CORRELATION KASAMI
B LOST PEAK MU
KASAMI SEQUENCE GENERATOR
& DISPLAY STATUS SIGNALIN
This block consists of three main modules a memory bank where the Kasami sequences i are stored, a BPSK modulator, and a band pass filter that can be configured depending on the operation mode A or B. Four orthogonal Kasami sequences are stored in configuration time in a read-only memory.
Depending on the configuration, a Kasami
Fig. 1:Schematic of the proposed track circuit
Fig 2: Influence of the shunting resistance (0.1, 1, 2, 5, and 10) of a train on the amplitude of the correlation output
sequence i is used for the transmission and will be read from the memory.t any moment, the read bit I [n] configures how a period of the modulation carrier is read from a RAM memory (BRAM) . A total of Me=20 samples of this period have been stored, and by changing the order in which they are read, the BPSK modulation is carried out. A finite state machine (FSM) manages the global operation at a frequency
of 100 or 180 kHz, depending on modeAorB. Note that these values come from the fact that Me=20 samples for a carrier period are stored, sofcAÂ·Me=5kHzÂ·20=100kHz and fcBÂ· Me=9kHzÂ·
20=180 kHz. The samples from the RAM memory generate the signal ei [n]to be transmitted. Kasami code generation shown in fig 3.
Fig 3: Kasami code generation
The proposed system has been implemented in a Xilinx XC3S1200E FPGA.Furthermore, the design supports the external clock frequency offCLK=50 MHz. Some experimental tests have been carried out to validate the correctness of the proposal. For that, the experimental setup has been prepared. As can be observed, two nodes have been installed, one working in mode A and another in mode B, with different orthogonal Kasami codes c1andc2. Furthermore, a track emulator has been used with two different lengths to be considered, i.e., 200 and 1000 m. For better safety and realiabity of track circuit.
Fig 4. Output of proposed
An algorithmic proposal and its implementation have been developed for a track circuit for railway applications. It is based on the encoding of the transmitted signal by a Kasami sequence, so first, it is possible to achieve satisfactory performances, even for reduced signal- to-noise ratios. Furthermore, the multiple emissions achieved without cross interference among encoded signals allows links to be established between successive track circuits, thus increasing detection reliability and railway safety. The real-time implementation and validation of the system designed has been carried out in a proposed prototype based on a low-cost Xilinx XC3S1200E FPGA. The experimental setup has two nodes (one track circuit), which can be emulated with different distances to evaluate the performance of the proposal. The correctness of the results has been checked up to distances of 1000 m,
adjacent nodes and its own emission to check the correct operation of the node. The node implementation should be analyzed to provide fault tolerance and reliability and availability evaluations. Furthermore, tests in more realistic environments will be considered, as well as commercial manufacturing issues.
D. Poole and D. Barker,Digitally coded track circuit, inProc. Int. Conf. Elect. Railway Syst. New Century, London, U.K., 1987, p. 400.
High Frequency Track Circuits, Union Switch & Signal Inc., 1999, Service Manual 5865.
N. Nedelchev, Jointless track circuit length, Proc. Inst. Elect. Eng.Elect. Power Appl., vol. 146, no. 1, pp. 6974, Jan. 1999.
A. Debiolles, L. Oukhellou, P. Aknin, and T.
Denoeux, Track circuit automatic diagnosis based
on a local electrical modeling, inProc. 7th World Congr. Railway Res., Montreal, QC, Canada, 2006
A. Mariscotti and P. Pozzobon, Measurement of the internal impedance of traction rails at audiofrequency,IEEE Trans. Instrum. Meas., vol. 53, no. 3, pp. 792797, Jun. 2004.
F. Filippone, A. Mariscotti, and P. Pozzobon, The internal impedance of traction rails for DC railways in the 1100 kHz frequency range,IEEE Trans. Instrum. Meas., vol. 55, no. 5, pp. 16161619, Oct. 2006.
A. Marisc otti, M. Ruscelli, and M. Vanti,
Modeling of audiofrequency track circuits for validation, tuning and conducted interference predic -tion, IEEE Trans. Intell. Transp. Syst., vol.
11, no. 1, pp. 5260, Mar. 2010.
R. J. Hill, Optimal construction of synchronizable coding for railway track circuit
data transmission,IEEE Trans. Veh. Technol., vol. 39, no. 4, pp. 390399, Nov. 1990.
T. Akio, Development of a train detection
system and a spread spectrum transmission system for track circuit in Proc. 47th IEEE Veh. Technol. Conf., Phoenix, AZ, 1997,vol. 3, pp. 19221926.
P. Fan and M.Darnell, Sequence Design
For Communications Applications,1st ed. Hertfordshire, U.K. Res. Stud., 1996.
B. Hemmer, A.Mar iscotti, and D.Wuergler,
Recommendations for the calculation of the total disturbing return current from electric traction ve-hicles,IEEE Trans. Power Del., vol. 19, no. 3, pp. 1190 1197, Jul. 2004.
T. Kasami, Weight distribution formula for some class of cyclic codes, in Combinational Mathematics and Its Applications. Chapel Hill, NC: Univ. North Carolina Press, 1969.
The Specification and Demonstration of Reliability, Availability, Maintainability and Safety (RAMS) for Railways Applications, SS-EN-50 126, 1999.
being capable of detecting transmissions coming from
A. P. Patra, Maintenance decision support models for
NCRTET-2015 Conference Proceedings
B. Nelson, Frequen cy-domain sonar
railway infrastruc-ture using RAMS & LCC analyses,Ph.D. dissertation, Div. Operation Maintenance Eng., Lulea Univ. Technol., Lulea, Sweden, 2009.
R. J. Hill, S. Brillante, and P. J. Leonard, Railway track transmission line parameters from finite element field modeling: Series impedance, Proc. Inst. Elect. Eng. Elect.Power Appl., vol. 146, no. 6, pp. 647660, Nov. 1999.
A. Mariscotti and P. Pozzobon, Experimental results on low rail-to-rail conductance values,IEEE Trans. Veh. Technol., vol. 54, no. 3, pp. 1219 1222, May 2005.
D. V. Sarwate and M. B. Pursley,
Crosscorrelation properties of pseudo-random and related sequences,Proc. IEEE, vol. 68, no. 5, pp. 593 619, May
V. A. Kumar, A. Mitra, and S. R. M. Prasana,
On the effectivity of different pseudo-noise and orthogonal sequences for speech encryp- tion from correlation properties, Int. J. Inf. Technol., vol. 4, no. 2, pp. 455462, 2007.
Digilent Nexys2 Board Reference Manual Product Specification, Digilent, Inc., Pullman, WA, Jun. 2008..
Spartan-3E FPGA family: Complete Data Sheet Product Specification,Xilinx, Inc., San Jose, CA, 2007.
processing in FPGAs and DSPs, inProc. IEEE Symp. FCCM, Napa Valley, CA, 1997, pp. 306307.
E. Monmasson and M. Cirstea, FPGA design methodology for industrial
Control systemsA review,IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 18241842, Aug. 2007.
DAC121S101 12-Bit Micro Power Digital-to-Analog Converter with Rail-to-Rail OutputProduct specification, Nat. Semicond. Corp., Santa Clara, CA, 2005.
ADCS7476 1MSPS, 12 -/10-/8-Bit A/D Converters in 6- Lead SOT-23Product Specification,Nat. Semicond. Corp., Santa Clara, CA, 2005.
CY7C68013A/CY7C68015A EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller, Cypress Semiconductor Corporation,
2004, document #38-08032, rev.E.
Validation and supply of electronic timers for safety installations at level crossing, RENFE, Tech. Spec. ref. 03.365.526.7, 1995
FPGA- Based Track Circuit for Railways
Using Transmission Encoding ieee transcation on intelligent transportation systems, Jun.2012.