- Open Access
- Total Downloads : 18
- Authors : R. Johnson Uthayakumar , R. Nirosha , N. Parvathi
- Paper ID : IJERTV7IS060077
- Volume & Issue : Volume 07, Issue 06 (June 2018)
- Published (First Online): 15-06-2018
- ISSN (Online) : 2278-0181
- Publisher Name : IJERT
- License: This work is licensed under a Creative Commons Attribution 4.0 International License
Investigation of Switching Angles Corresponding to the Elimination of Voltage Harmonics in Asymmetrical Seven Level Inverters
R. Johnson Uthayakumar1,
Department of Electrical and Electronics Engineering Vel Dr. RR Dr.SR university1
R. Nirosha 2 ,
Lab Incharge ,
Department of Electrical and Electronics Engineering, Vel Dr. RR Dr. SR university2
N. Parvathi 3
Assistant Professor ,
Department of Electrical and Electronics Engineering, Vel Dr. RR Dr. SR university3
Abstract – This work discusses the investigation of notches corresponding to the elimination of voltage harmonics in single phase seven level asymmetrical inverter. The simulation is done using MATLAB-Simulink environment for modulation index ma =
0.8 and for various modulation frequencies mf. The reference is a stepped wave form and the carrier are triangular carrier are used for generation of pulse width modulation (PWM) in order to turn on the switches. Performance parameters are root mean square value of output voltage, DC component in output voltage, Average of output voltage, form factor, total harmonic distortion and crest factor are compared and analyzed for various carrier frequencies. It was found that the THD is better in few of the modulation index and eliminated in case of few cases.
Multilevel inverters plays an important role in the area of power electronics and power systems. The several output levels of the multilevel inverter aides them to be used in PV based plants. The carrier frequency fc determines the number of pulses per half cycle. The modulation index (ma) controls the output voltage. Tolbert et al  have derived a procedure to find all sets of switching angles for which the fundamental is produced while the 5th and 7th are eliminated. Sun and Yun have proposed a hybrid PWM method for the new topology that has different cells working in different switching frequencies in order to achieve low switching losses. Palanivel and Dash  have developed various carrier based pulse width modulation techniques which can minimize the total harmonic distortion and enhance the output voltage for a five level inverter. Shanthi and Natarajan  presented the use of Control Freedom Degree (CFD) combination. The effectiveness of the Pulse Width Modulation (PWM) strategies developed using CFD are demonstrated by simulation. Du et al  discussed about the control of seven-level Hybrid Cascaded Multi Level Inverter (HCMLI) with fundamental frequency switching control and how its modulation index (ma) range can be extended using triplen harmonic compensation. Xiao et al  have proposed a strategy to minimize harmonics and achieve zero error tracking. Tolbert et al  explored the benefits and
discussed control schemes of the cascade inverter for use as an Electric Vehicle (EV) motor drive or a parallel Hybrid Electric Vehicle (HEV) drive and the diode-clamped inverter as a series HEV motor drive. Josh and Jerome have stated that the power quality improvement can be achieved by reducing the harmonics at the output voltage of the inverter. Colak et al  have done intensive studies and have proposed carrier based sinusoidal space vector and sigma delta PWM methods in open loop control of inverters. Seyezhai and Mathur  have reduced the switching losses and improved the power quality using variable frequency inverted sine PWM strategy. Lau et al  have found analytical solutions for determining the spectral characteristics of multicarrier based multilevel PWM pulses for the inverters. Carrier-based PWM modulation for reduction of THD and losses in multilevel inverters was studied by Barreto et al . Yousef poor et al  have found an optimization algorithm to get a reduced THD. Batschauer et al  explored the hybrid multilevel inverter with half bridge circuit with unidirectional power flow. Cougo et al  have analysed and found that the Phase Disposition (PD) method is the best method to reduce the current imbalance in multilevel inverter. This paper investigates the switching angles for various switching frequencies of carrier PDPWM strategies using stepped reference for chosen single phase AMLI.
Several inverters are series connected, with different topologies and different input voltages. Hence they are said to be AMLIs. A seven level output voltage is achieved with two bridges in asymmetrical inverter whereas only five level output voltage will be achieved with two such bridges in case of conventional cascaded MLI. In AMLI more voltage levels can be achieved with lesser number switches. Figure1 shows the chosen asymmetrical single phase inverter. Each cell has two pairs of complementary switches S11 and S22 and S12 and S21. The single phase asymmetrical seven level uses lesser number of switches and produces more output levels. The topology used in this paper is two cascaded H-bridges with eight switches. The modulation strategies used are the phase opposition disposition pulse width modulation with triangular carrier and stepped reference. The analysis is done for various carrier frequencies such that the angles are calculated for each carrier frequencies.
The results are tabulated for mf various frequencies from 1203 hertz to 1224 hertz. The frequencies are so chosen that they suppress, recuse or eliminate the third order harmonics.
Fig.1. Single phase asymmetrical cascaded seven level inverter
Fig.2. Sample PWM generation logic developed using MATLAB-SIMULINK
for bipolar VFPWM technique
Fig.1. Single phase asymmetrical cascaded seven level inverter MATLAB
Fs=1203 and mf=24.06
Fs=1206 and mf=24.12
Fs=1209 and mf=24.18
Fs=1212 and mf=24.24
Fs=1215 and mf=24.3
Fs=1218 and mf=24.36
Fs=1221 and mf=24.42
Fs=1224 and mf=24.48
Fig.1. THD for ma=0.8, fs=1203 and mf=24.06
Fig.2. THD for ma=0.8, fs=1206 and mf =24.12
Fig.3. THD for ma=0.8, fs=1209 and mf =24.18
Fig.4. THD for ma= 0.8, fs=1209 and mf =24.24
Fig.5. THD for ma= 0.8, fs=1212 and mf =24.24
Fig.6. THD for ma= 0.8, fs=1218 and mf =24.36
Fig.7. THD for ma= 0.8, fs=1221 and mf =24.42
Fig.8. THD for ma= 0.8, fs=1224 and mf =24.48
I.a. PDPWM STRATEGY
In this strategy carriers have same frequency, amplitude and phase, but they are just different in DC offset to occupy contiguous bands. For this technique, significant harmonic energy is concentrated at the carrier frequency fc but because it is a co-phase component, it does not appear in the line voltage. It should be noted that the other harmonic components are centered on the carrier frequency as sidebands. This technique employs (m-l) carriers which are all in phase for a m level inverter. In seven level converter all the six carrier waves are in phase with each other across all the bands as described in Fig.3 for a phase leg of a seven level AMLI structure with ma = 0.8. The pulse pattern for AMLI with hybrid carriers Stepped sine PDPWM strategy is employed.
Fig.9 Carrier arrangement for ma=0.8, fs=1203 and mf = 24.06
Fig.10 Carrier arrangement for ma=0.8, fs=1206 and mf=24.12
Fig.11 Carrier arrangement for ma=0.8, fs=1209 and mf = 24.24
Fig.12 Carrier arrangement for ma=0.8, fs=1212 and mf=24.18
Fig.13 Carrier arrangement for ma=0.8, fs=1215 and mf=24.24
Fig.14 Carrier arrangement for ma=0.8, fs=1218 and mf=24.36
Fig.15 Sample output voltage for ma=0.8, fs=1224 and mf=24.48
Fig.16 Sample output current for ma=0.8, fs=1224 and mf=24.48
The paper investigated the switching angles corresponding to the elimination of voltage harmonics in asymmetrical seven level inverters. It was found that the THD is better in few of the modulation index and eliminated in case of few cases.
Fig.14 Carrier arrangement for ma=0.8, fs=1221 and mf=24.42
Fig.14 Carrier arrangement for ma=0.8, fs=1224 and mf=24.48
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