 Open Access
 Total Downloads : 697
 Authors : T.V. Snehaprabha, Dr. Sanjay Lakshminarayanan
 Paper ID : IJERTV2IS3108
 Volume & Issue : Volume 02, Issue 03 (March 2013)
 Published (First Online): 14032013
 ISSN (Online) : 22780181
 Publisher Name : IJERT
 License: This work is licensed under a Creative Commons Attribution 4.0 International License
Dodecagonal Space Vector Generation For Multilevel Inverter Fed Induction Motor Drive
T.V. Snehaprabha, Associate Professor, E&E Department,
M S Ramaiah Institute of Technology, Bangalore560054
Dr. Sanjay Lakshminarayanan, Associate Professors, E&E Department, M S Ramaiah Institute of Technology, Bangalore560054
Ms . Snehaprabha T.V received BSc Engineering degree in Electrical Engineering from NSS College of Engineering, Calicut University, Kerala, India in the year 1981 and ME from UVCE, Bangalore, India, in 1989. She is currently an Associate Professor at M S Ramaiah Institute of Technology in EE Dept, Bangalore, India. She is having 30 years of teaching experience .At present she is pursuing towards her doctoral degree from JNTU, Hyderabad, India .
Dr.Sanjay Lakshminarayanan received the B.Tech. degree from the Indian Institute of Technology (IIT), Kharagpur, India, in 1990 and the M.Sc. (Engg.) degree in electrical engineering in 1995 and the Ph.D. degree in 2007 from the Indian Institute of Science, Bangalore, India,in 1995. He has been in the industry for about ten years. He was with Grentel Technologies, Cochin, Hical Magnetics Pvt. Ltd, Bangalore, and GE Medical Systems, Bangalore. His research interests are in the area of power converters, PWM strategies, and motor drives.
Abstract
The proposed power circuit that consists of three cascaded two level inverters generates Dodecagonal space vector structure. From this scheme it is possible to control an IM under V/F mode. Harmonics of the order 5th&7thcan be eliminated completely.Torque pulsations and losses are reduced due to the reduction in harmonics.
Index terms: Dodecagonal, Harmonics, SVPWM.

INTRODUCTION
Ever since the invention of the 3level inverter [1], multilevel inverters are a major topic of ongoing research. The advantages of multilevel inverters are discussed in literatures.
With the introduction of multilevel converters, switches with lower voltage rating could be used. From the MLI operation, the harmonics in the output waveform can be shifted to higher frequencies which in turn reduce the size of filters. The dv/dt stress on individual device is less and this will help to reduce EMI problems [2][4]. Also the switching frequency can be maintained at a lower value in order to reduce switching losses without sacrificing the quality of the output waveform.
A dodecagonal space vector inverter is a class of multilevel inverter in which 12 voltage space vectors 30 apart are produced along the radii of a 12 sided polygon known as a
dodecagon(Fig.2). The concept of dodecagonal space vectors has been in vogue in the recent past [510]. There are some advantages with dodecagonal space vectors structure over the hexagonal structure from conventional two level inverters. By this method 6nÂ±1 (n=odd) harmonics are completely eliminated. There is also an increase in the linear modulation range. The maximum fundamental peak available for a hexagonal structure is 0.577 & for the structure with 12 sides it is 0.644.So 11.6% [0.644/0.577] more linear region is possible from dodecagonal mode structure.
The power circuit is shown in Fig. 1, it is the same as in paper [5], but the DC link voltages are different and the combination of switches needed to generate the voltage space vectors are different.There are 12 principal voltage space vectors from this topology.A reference vector lying in a sector can be generated by time averaging the two principal voltage space vectors encompassing the sector.

POWER CIRCUIT AND VOLTAGE SPACE VECTORS
The proposed topology is realized by cascading three conventional twolevel inverters, fed from asymmetrical isolated dc voltage sources of value 0.577k Vdc,0.423k Vdc& 0.155Vdc as shown in Fig1.(the factor k is selected such that the radii of the 12sided voltage space vector polygon is the same as that of the conventional hexagonal voltage space vector structure.
Fig 1: Power circuit of the proposed scheme.
The total voltage is 1.155Vdc. Each phase can take four different levels;0.577kVdc, 0.423kVdc&0.155kVdc. The twelve space vectors are formed by combination of voltage space vectors along three phases.
Fig 2: dodecagonal space vectors & its formation
Table1: Generation of the 12 voltage space vectors
Figure 2 shows the twelve space vectors as the radii of a dodecagon and how the space vectors are constructed from the three phases. Vectors OA and OC are of magnitude 1Vdc, AB or x is of magnitude 0.155 Vdc and BC or y is of magnitude 0.577Vdc. Vector OC is seen as the resultant of OB along a axis and BC along baxis. Similarly all the 12 principal vectors can be constructed from the components. The Table1 gives the voltage levels that need to be in each phase to generate the 12 principal space vectors.
The harmonics seen in the phase voltage are the 12nÂ±1 (n=integer) harmonics. These are predominant at lower speeds. At high speeds of the order of 50Hz, the harmonics constitute less than 10% of the fundamental.

SPACE VECTOR PWM
The voltage space vector is defined by the following expression:
2
j
VS Va Vb .e 3
4 j
Vc .e 3
If Va , Vb and Vc are three phase quantities with magnitude Vmand phase difference 1200 then
the voltage space vector VS
turns out to be a vector rotating in time with a magnitude of V .
m
m
In the space vector PWM (SVPWM) technique, one aims at generating a rotating space vector and this is done by time averaging the principal space vectors present in order to emulate the rotating space vector. This results in a PWM pattern in the output phases similar to other PWM techniques such as sine triangle PWM. However SVPWM is far more amenable to implementation using a DSP.
Here TS is the sampling period, T1 is the amount of time for which the lower vector in Fig.3 is kept active and T2is the time duration for which the upper vector is kept active. This is done in every sector in which the resultant space vector V1 lies at the angle. Tois the dead time during which there is no output and it is negative if there is overmodulation.

V/F CONTROL USING THE INVERTER
Vdc is so chosen so that at 50Hz operation, the peak phase voltage is 325V, this corresponds to Vdc=505V.
Fig. 3: Time averaging vectors forming a sector
The time duration for which each space vector should be active is given in equation(1)
1
1
T V1 .T
. Sin(30 ) , T
V1 .T
. Sin( )
,T =T +T +T ——(1)
Vdc
S Sin(30 ) 2
Vdc
S Sin(30 ) s 1 2 o
The number of samples per sector selected for this study is given below.
0<f<=15Hz: 4 samples per sector; 15<f<=30Hz: 3 samples per sector;30<f<=45Hz : 2 samples per sector;45<f<=50Hz: 1 sample per sector
At 50Hz each principal vector is kept active for
=1.667ms and results in a 12 step
waveform, in this case T1is 1.667ms, T2=0 and TS= T1, and dead time To =zero. At 47Hz
operation, since we are using a constant V/f ratio, T and T2 are the same but T = =
1 S
=1.77ms, SoTo=0.1064ms.In the 30 to 45 Hz frequency range , = 0 and 15. Here
T = .The tables summarize the time durations T , T and To that are needed at a particular
S 1 2
frequency of operation.
Table 2: Time durations for frequency between 30 and 45Hz;Tabe 3: Time durations for frequency between 15 and 30Hz&Table4: Time durations for frequency 15Hz and below.
1
For15Hz<f<=30Hz, TS= = 36 f
, and for 0<f<=15Hz, T = =
S
S
The entire system is simulated using SIMULINK. The operating frequency is an input to the controller. A counter chooses the sector in which the voltage space vector is located. It also
selects the angles at which the space vectors are to be generated. T1
, T2
andTo are taken as per
2
the above explanation. The logic is as follows. When the value To is greater than the carrier
2
triangular value the output (P as shown in Fig4) is high. Similar logic is used for the output Q &R. QP = T1& RQ= T2
Fig.4: PWM signal generation
A saw tooth waveform as shown in fig. 4 with a time period Ts is used to generate the T1 and T2 durations. Look up tables are used to store the pole voltage levels which decide the principal space vector combinations as in table1.

SIMULATION RESULTS
The fig.5 shows the pole voltage& phase voltage at a frequency of 50Hz .Here the 12 step waveform is clearly seen.Fig.6 shows the Fourier components in the phase voltage at 50Hz. In this only the 12nÂ±1 harmonics are seen and their amplitudes are less than 10% of the fundamental. Complete absence of the 6nÂ±1 (n=odd) harmonics is observed.The motor current at 50Hz operation is nearly a pure sinusoidal waveform as the harmonics are very low.
Fig. 5: Pole voltage& Phase voltage at 50Hz
1
Vph50hz relative magnitude
Vph50hz relative magnitude
0.8
0.6
0.4
0.2
0
0 10 20 30 40 50 60 70 80 90 100
harmonic order
Fig6 Fourier of phase voltage at 50 Hz
Fig7 Phase voltage and its FFT spectra at 33Hz
Figures7 showsthephase voltage and itsFFT spectra at 33Hz and observe the absence of 6nÂ±1 (n=odd) harmonics in the FFT spectra.
Fig. 8: Vph, current&Fourier components of phase voltage at 5 Hz
Fig9 Fourier components of phase voltage at 10 Hz
The current, phase voltageand itsFourier components at5Hz operation are shown in fig.9.
Upto 15Hz as the number of samples per sector is 4; the switching frequency is 4×12=48 times the fundamental. As even harmonics are absent due to the symmetry, prominent harmonics of the order of 47th&49th are seen as shown in fig8 and 9. TABLE5 gives a comparative study of harmonic contents in the phase voltage and current atdifferent frequencies.
TABLE5

CONCLUSIONS
The paper introduces one to a dodecagonal space vector based multilevel inverter. There is an increase in the linear modulation range.Torque pulsations and losses can be reduced due to the absence of6nÂ±1, n=odd harmonics in the entire modulation range.
In this case the switching takes place between the zero vectors and the vector at the boundary of the polygon structure. The disadvantages are the existence of higher dv/dt & increased device rating. Hence a hybrid scheme, which is a combination of hexagonal & dodecagonal structure, is suggested.
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