 Open Access
 Total Downloads : 574
 Authors : B.Vennela, K. Sanath Kumar
 Paper ID : IJERTV2IS90151
 Volume & Issue : Volume 02, Issue 09 (September 2013)
 Published (First Online): 13092013
 ISSN (Online) : 22780181
 Publisher Name : IJERT
 License: This work is licensed under a Creative Commons Attribution 4.0 International License
Design of NCO by Using CORDIC Algorithm in ASICFPGA Technology
B.Vennela, K. Sanath Kumar,
AbstractCoordinate Rotation Digital Computer (CORDIC) based digital signal processing has become an important tool in communications, biomedical and industrial products, providing designers with significant impetus for making algorithm into architecture. The algorithm has been realized in the ASIC FPGA technology. There are numerous applications in the world of DSP that utilizes a NCO. As we are using ASICFPGA, we can change power, area, and speed as per our requirement, which can t be done in simple FPGA. As the output of NCO is a sinusoidal signal, we can use it in adiabatic circuits (i.e., energy recovery circuits) which are useful in designing in low power circuits.
Keywords CORDIC, NCO, FPGA, ASICFPGA

INTRODUCTION
The Coordinate Rotation Digital Computer (CORDIC) algorithm was developed by J. E. Volder in 1959, to replace the analog resolver in the B58 bomber navigation computer at the aero electronics department at convair. In 1971, Walther has generalized this algorithm to implement rotation in circular, linear and hyperbolic coordinate systems. Since it is being used in applications such as digital signal processing, graphics, image processing, and kinematic processing. The advances in the VLSI technology have extended the application of CORDIC algorithm recently to the field of biomedical signal processing, neural networks and wireless communications .It is particularly suited for the handheld calculators for which cost is much more important than speed.

CORDIC PRINCIPLE
The CORDIC algorithm approaches the target angle by several iterations.
Figure 1:An illustration of the CORDIC algorithm
The basic idea of CORDIC is to rotate the vector over given angle. Each basic rotation is realized by using shift and add operations. A vector is rotated through fixed number of steps called as iterations. If a vector v having coordinates (x and y) is rotated through an angle then obtaining a new vector with coordinates where x and y can be obtained using following method.
where X = r cos , Y = r sin
As showed in figure 1,the CORDIC algorithm transforming a vector x, y into a new vector x, y. The basic iteration functions of CORDIC algorithm can be seen in the formula
(1).
From formula(1) formula(2) can be derived
Where I is the current iterative times from 0 to N
Ki will be approximately equal to 0.6073 when sufficient iteration steps were computed. so the iteration eqn should multiply a gain which is computed by eqn(4)
The effective model of the rotation iterative which was used by the CORDIC algorithm is shown in equation (5).
For every step of the rotation is computed as a sign of the zi :
Then the result is
The result is shown in the equation (8) when the initial vector y0 =0.

A phase accumulator (PA),is generally a counter which determines the frequency of the output wave. It stores the current value of the sines phase, and the amount it changes every cycle is normally refer to as phase.

A phasetoamplitude converter (PAC), is a look up table (LUT) containing waveform data (usually a sinusoid) for exactly one period. It uses the Pa output usually as an index into a LUT to provide a corresponding amplitude sample.
Figure 2: Block diagram of NCO
From the above fig 3, as it uses LUTs it requires
more logic resources, hence more area and power
.to reduce the area there by power, we are proposing a new block diagram can be seen below. The output frequency of the oscillator is given by
VI.PROPOSED NCO
If X0 is input data, the Xn and Yn computed by the NCO are the results of the mixing. When we dose not use the multipliers, we can obtain the mixing data, which can reduce the hardware resources.


NUMERICALLY CONTROLLED OSCILLATOR
A Numerically Controlled Oscillator produces a digital signal generator which is synchronous (i.e., clocked) usually sinusoidal. It offers some advantages in terms of accuracy, stability and reliability. It has many applications in communication systems, software defined radios, radar systems , and drivers in acoustic or optical transmissions.
Operation:
Generally a NCO consists of 2 parts
Figure 3:Block diagram of proposed NCO
It contains a simple counter to provide angles to the CORDIC algorithm, as we know CORDIC calculates the required operation accurately.
V.IMPLEMENTATION
The verilog code is written for this paper. And it is simulated using Questasim simulator, synthesized using Precision synthesis tool. For the calculation of power , we go for cadence tools
Schematic of CORDIC algorithm
Figure 4:RTL view of CORDIC

RESULTS

CONCLUSION
We are using CORDIC algorithm for calculating trigonometric functions accurately and a NCO generate synchronous signal with accuracy. In ASICFPGA, as we can change the parameters like area , speed and power. If we are increasing the speed, can use it in high speed applications like CISC, XEON processors.
REFERENCES
1. J.E. Volder, The CORDIC Trigonometric Computing Technique, IRE Transactions on Electronic Computers, vol. EC8, no. 3, 1959, pp. 330 334.
2 J. E. Volder, The CORDIC Trigonometric Computing Technique, IRE Trans. on Electronic Computers, vol. EC8, pp. 330334, Sep. 1959.

J. S. Walther, A unified Algorithm for Elementary Functions, in Proceedings of the 38th Spring Joint Computer Conference, pp. 379 385, 1971.

A. M. Despain, Fourier Transform Computers Using CORDIC Iterations, IEEE Transactions on Computers, vol. C30, pp. 9931001, Oct. 1974.

S.F.Hsiao and J.M. Delosme, The CORDIC Householder Algorithm, in Proc. of the 10th Symp. On Computer Arithmetic, pp. 256263, 1991.

J.R. Cavallaro and F. T. Luk, CORDIC Arithmetic for a SVD processor, Journal of Parallel and Distributed Computing, vol. 5, pp. 271290, 1988.

E.Deprettere, P. Dewilde, and R. Udo, PipelinedORDIC Architecture for Fast VLSI Filtering and Array Processing, in Proceedings of ICASSP84, pp. 41.A.6.141.A.6.4, 1984.

CORDIC Architectures: A Survey, B. Lakshmi and A. S. Dhar, Journal: VLSI Design, January 2010.
9."Numerically Controlled Oscillator". Lattice Semiconductor Corporation. 2009.
10.US 7437391, Miller, Brian M., "Numerically controlled oscillator and method of operation", issued October 14, 2008