Category Archives: ICSEM – 2013 (Volume 1 – Issue 06)

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Design of Low Error and Power Fixed Width Multiplier by Using Dual Tree Error Compensation

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Low Complexity Design of Non-binary LDPC Decoder Using Extended Min-sum Algorithm

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Floating point units in hybrid FPGA using clock gating

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Speed enhancement and leakage reduction in advanced WDR image sensors

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DA-Based DCT with Error-Compensated Adder Tree

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Optimized web personalization -implementation using web mining techniques

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FPGA implementation of RSEPD technique based impulse noise removal

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Recommendation on bundling the items using item basedcollaborative filtering technique

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Recommendation of Desired Learning Path to Provide Optimized Concept Access

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Reconfigurable controller design for continuous stirred tank reactor

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