DOI : 10.17577/IJERTV14IS060180
- Open Access
- Authors : Tejeswara Rao Padda, Thummala Thoshani, Gunduboina Pallavi, Nagi Reddy Prasanna Lakshmi
- Paper ID : IJERTV14IS060180
- Volume & Issue : Volume 14, Issue 06 (June 2025)
- Published (First Online): 29-06-2025
- ISSN (Online) : 2278-0181
- Publisher Name : IJERT
- License:
This work is licensed under a Creative Commons Attribution 4.0 International License
ThirdEye: FPGA-Powered Ultrasonic Navigation Aid for the Blind
Tejeswara Rao Padda,
R&D Engineer, Sense Semiconductors and IT Solutions Pvt. Ltd., Mangalagiri, Guntur, Andhra Pradesh, India
Thummala Thoshani, Gunduboina Pallavi, Nagi Reddy Prasanna Lakshmi
Undergraduate Student, Rajiv Gandhi University of Knowledge Technologies, RK Valley, Kadapa, Andhra Pradesh, India
Abstract
ThirdEye, an FPGA-powered blind stick, revolutionizes mobility for visually impaired individuals by integrating real-time obstacle detection with the EDGE Artix-7 FPGA and HC-SR04 ultrasonic sensor. Leveraging Verilog-coded finite state machines, the system triggers 40 kHz ultrasonic pulses, processes echo signals, and computes distances using
the formula Distance = 343 m/s×Duration , achieving 95% detection accuracy within a 40
2
cm threshold. The FPGAs parallel processing ensures a 50 ms response time, enabling proactive alerts via a 2 kHz buzzer and distance visualization on a seven-segment display. Unlike microcontroller-based solutions, ThirdEyes reprogrammable architecture supports scalable enhancements, such as multi-sensor integration or AI-driven environmental analy-sis. Experimental validation in indoor settings confirms robust performance, with resource utilization of 10% LUTs and 5% flip-flops on the XC7A35T FPGA. The prototypes cost-effective design, utilizing affordable components, outperforms traditional white canes by reducing dependency and enhancing safety. Compared to prior assistive devices, ThirdEye reduces latency by 30% and offers modular upgrades for outdoor adaptability. Future inno-vations include incorporating infrared sensors for 360-degree detection, optimizing power for battery-operated use, and embedding machine learning for contextual awareness. This work advances assistive technology by delivering a high-performance, accessible blind stick, addressing the global challenge of visual impairment with a scalable, FPGA-driven solution.
Keywords: FPGA-Based Navigation, Ultrasonic Obstacle Detection, Assistive Tech-nology, Real-Time Processing, Blind Stick, Visually Impaired Mobility, Verilog Imple-mentation
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INTRODUCTION
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Background and Motivation
Visual impairment affects approximately 2.2 billion people worldwide, significantly limiting their ability to navigate independently [1]. Traditional mobility aids, such as white canes, provide tactile feedback but lack proactive obstacle detection, posing safety risks in dynamic environments [11]. The growing demand for assistive technologies that enhance autonomy and safety has driven research into electronic navigation aids. These systems aim to provide real-time environmental awareness, reducing dependency on external assistance and improving quality of life for visually impaired individuals.
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Related Work
Assistive devices for the visually impaired have evolved from simple mechanical tools to so- phisticated electronic systems. Microcontroller-based blind sticks, such as smart canes, utilize ultrasonic sensors for obstacle detection but suffer from limited processing speed and scala-bility [2, 4]. Lee et al. [6] reviewed various navigation aids, noting that many lack real-time performance due to sequential processing constraints. FPGA-based systems, as explored by Johnson et al. [3], offer parallel processing capabilities, enabling low-latency responses criti-cal for dynamic environments. Zhao et al. [7] demonstrated FPGA-driven ultrasonic detection with improved accuracy, though their system lacked user-friendly interfaces. Other studies have investigated cost-effective designs [8] and sensor integration [10], but challenges remain in bal- ancing performance and affordability. Recent advances suggest AI-enhanced navigation [12], but such systems are computationally intensive and less accessible.
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Proposed System and Contributions
This paper presents the ThirdEye System, an FPGA-based blind stick leveraging the EDGE Artix-7 FPGA and HC-SR04 ultrasonic sensor for real-time obstacle detection. Unlike microcontroller-based solutions, the system utilizes Verilog-coded finite state machines to achieve a 50 ms response time and 95% accuracy within a 40 cm range [9]. The FPGAs reprogrammable architecture supports future enhancements, such as multi-sensor integration or low-power op-eration [5, 13]. By offering a cost-effective, scalable, and user-friendly solution, this work advances assistive technology, addressing limitations of prior systems [6, 11].
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LITERATURE SURVEY
The development of assistive devices for visually impaired individuals has seen significant ad-vancements, ranging from traditional tools to modern electronic systems. This section reviews key solutions, comparing their features and limitations with the proposed ThirdEye System, a blind stick designed for real-time obstacle detection.
Traditional white canes are widely used due to their simplicity and low cost. However, they rely on physical contact with obstacles, offering no advance warning and limited effec-tiveness in detecting overhead or dynamic objects. Microcontroller-based smart sticks improve upon this by incorporating ultrasonic sensors to detect obstacles within a short range, typically 50100 cm. These systems alert users via buzzers or vibrations but are constrained by slow processing speeds, leading to delays in dynamic environments. GPS-based navigation systems provide outdoor guidance by mapping routes, but they lack precise obstacle detection and are ineffective indoors or in areas with poor satellite coverage. Some advanced systems integrate cameras or AI for environmental analysis, but their high computational requirements increase cost and power consumption, limiting accessibility.
The ThirdEye System addresses these limitations by leveraging the EDGE Artix-7 FPGA for parallel processing, achieving a 50 ms response time and 95% detection accuracy within a 40 cm range. Unlike microcontroller-based sticks, it offers reprogrammability for future enhancements, such as multi-sensor integration. Table 1 compares these systems across key parameters.
Table 1: Comparison of Assistive Devices for Visually Impaired
System
Technology
Detection Range
Response Time
Cost
Scalability
White Cane
Mechanical
Contact-
N/A
Low
None
Microcontroller
Ultrasonic,
based
50100 cm
100150 ms
Moderate
Low
Smart Stick GPS-Based
System
MCU GPS, MCU
N/A
200300 ms
High
Moderate
ThirdEye Sys- tem
FPGA, Ultra- sonic
40 cm
50 ms
Moderate
High
Figure 1 illustrates the response times of these systems, highlighting the ThirdEye Systems superior performance due to the FPGAs parallel processing.
Figure 1: Response time comparison of assistive devices.
The ThirdEye Systems cost-effective design, real-time performance, and scalability make it a significant advancement over existing solutions, offering a practical and accessible blind stick for visually impaired users.
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SYSTEM METHODOLOGY
The ThirdEye System is a blind stick designed to enhance mobility for visually impaired in-dividuals by detecting obstacles in real-time using the EDGE Artix-7 FPGA and HC-SR04 ultrasonic sensor. This section details the systems components, connections, implementation, and operational flow.
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System Overview
The ThirdEye System integrates an ultrasonic sensor with an FPGA to create a blind stick that detects obstacles within a 40 cm range. The FPGA processes sensor data to calculate distances, triggering a buzzer for alerts and displaying results on a seven-segment display. The systems parallel processing ensures rapid responses, improving safety and independence for users.
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Components
The system comprises the following components:
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HC-SR04 Ultrasonic Sensor: Emits 40 kHz pulses to detect obstacles from 2400 cm.
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EDGE Artix-7 FPGA: Processes sensor data using the XC7A35T chip with 33,280 logic cells and 1.8 Mb block RAM.
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Buzzer: Produces a 2 kHz tone when obstacles are within 40 cm.
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Jumper Wires: Connect components to the FPGA. Table 2 summarizes the specifications.
Table 2: Component Specifications
Component Specification
HC-SR04 2400 cm range, 40 kHz frequency EDGE Artix-7 XC7A35T, 33,280 logic cells Buzzer 35V, 2 kHz tone
Jumper Wires Standard connectors
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Hardware Connections
The ultrasonic sensor interfaces with the FPGA through specific GPIO pins on the EDGE Artix-7 board. The connections are as follows:
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Trig Pin: Connected to FPGA GPIO pin IO_L13P_T2_MRCC_14 (Bank 14).
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Echo Pin: Connected to FPGA GPIO pin IO_L13N_T2_MRCC_14 (Bank 14).
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VCC: Connected to the 5V power supply pin on the EDGE board.
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GND: Connected to the ground (GND) pin on the board.
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Buzzer Output: Connected to FPGA GPIO pin IO_L17P_T2_13 (or any free digital out-put pin).
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Seven-Segment Display: Connected to dedicated GPIOs driving segment lines (AG, DP) and common anode/cathode lines.
The buzzer is connected to an FPGA output pin to emit alerts, and the seven-segment dis-play connects to multiple pins for distance visualization.
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Verilog Implementation
The system uses three Verilog modules:
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ultra_sonic: Generates 40 kHz trigger pulses and measures echo duration.
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top_module: Converts echo duration to distance in centimeters, controlling LEDs and buzzer based on a 40 cm threshold.
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seven_seg: Drives the seven-segment display to show distance. The distance is calculated using:
Distance = 343 m/s × Duration
2
The FPGAs 50 MHz clock ensures real-time processing with minimal latency.
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Block Diagram
The block diagram (Figure 2) illustrates the system architecture. The HC-SR04 sensor sends trigger pulses and receives echo signals, which the FPGA processes to compute distance. The FPGA then activates the buzzer for obstacles within 40 cm and updates the seven-segment display with the distance value.
Figure 2: Block diagram of the ThirdEye System.
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Finite State Machine (FSM)
The FSM manages the ultrasonic sensors operation, transitioning through five states (Figure 3):
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IDLE: Waits for the start of a measurement cycle.
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TRIG: Sends a 10 µs trigger pulse to the sensor.
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WAIT_ECHO_UP: Waits for the echo signal to go high.
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MEASUREMENT: Measures the echo pulse duration.
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MEASURE_OK: Computes distance and updates outputs.
The FSM ensures precise timing for accurate distance calculations.
Figure 3: Finite state machine diagram for ultrasonic sensor control.
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Flowchart
The flowchart (Figure 4) outlines the systems operational flow:
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Initialize FPGA and sensor.
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Send a 10 µs trigger pulse.
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Measure echo pulse duration.
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Calculate distance using the formula.
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If distance < 40 cm, activate buzzer and update LEDs.
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Display distance on seven-segment display.
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Repeat the cycle.
Figure 4: Flowchart of the ThirdEye System operation.
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IMPLEMENTATION
The ThirdEye System is implemented as a blind stick using the EDGE Artix-7 FPGA and HC-SR04 ultrasonic sensor to enable real-time obstacle detection. This section details the Verilog programming, simulation, RTL design, and hardware prototype development.
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Verilog Modules
The system is implemented using three Verilog modules to manage sensor operation, data pro-cessing, and output display. The ultra_sonic module generates a 10 µs trigger pulse at 40 kHz and measures the echo pulse duration from the HC-SR04 sensor. The top_module pro-
cesses the echo duration to compute the distance using the formula Distance = 343 m/s×Duration ,
comparing it against a 40 cm threshold to control LEDs and the buzzer. If the distance is less than 40 cm, the buzzer emits a 2 kHz tone, and specific LEDs are activated. The seven_seg module converts the distance into a format suitable for the seven-segment display, showing the value in centimeters. The modules operate on the FPGAs 50 MHz clock, ensuring low-latency processing.
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Simulation
The Verilog modules were simulated using Xilinx Vivado to verify functionality before hard-ware deployment. The simulation environment included a testbench to mimic the HC-SR04 sensors trigger and echo signals. The testbench applied a 10 µs trigger pulse and varied echo durations to simulate obstacles at 5 cm, 20 cm, and 40 cm. The resulting waveforms confirmed correct state transitions in the FSM (IDLE, TRIG, WAIT_ECHO_UP, MEASURE-MENT, MEASURE_OK) and accurate distance calculations. The simulation also verified buzzer activation and seven-segment display outputs. Figure 5 shows the simulation waveform, highlighting trigger, echo, and output signals.
Figure 5: Simulation waveform from Xilinx Vivado.
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RTL Diagram
The Register Transfer Level (RTL) schematic, generated by Vivado, illustrates the synthesized hardware architecture of the ThirdEye System. The RTL diagram shows the interconnections between the ultra_sonic, top_module, and seven_seg modules, with inputs from the HC-SR04 sensor (trigger and echo) and outputs to the buzzer and seven-segment display.
The diagram highlights the FPGAs logic cells and flip-flops, with resource utilization of 10% LUTs and 5% flip-flops on the XC7A35T chip. This efficient design ensures scalability for future enhancements. Figure 6 depicts the RTL schematic.
Figure 6: RTL schematic of the ThirdEye System.
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Hardware Prototype
The hardware prototype integrates the EDGE Artix-7 FPGA, HC-SR04 ultrasonic sensor, buzzer, and seven- segment display into a portable blind stick. The sensor is mounted at the sticks tip to detect obstacles, with jumper wires connecting the trigger and echo pins to the FPGAs GPIO ports. The buzzer and display are attached to the sticks handle for user accessibility, powered by the FPGAs 5V supply. The prototype is lightweight, ensurng ease of use for visually im-paired individuals. The physical assembly was tested to confirm robust connections and reliable operation. Figure 7 shows the assembled blind stick prototype.
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TESTING AND RESULTS
The ThirdEye System was rigorously tested to evaluate its performance as a blind stick for visually impaired users. Testing was conducted in controlled indoor environments to assess obstacle detection accuracy, response time, and reliability under varying conditions.
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Test Setup
The prototype was tested in a 5 m × 5 m indoor area with obstacles (e.g., walls, furniture) placed at distances of 5 cm, 20 cm, and 40 cm from the sticks sensor. The HC-SR04 sensor was configured to emit 40 kHz pulses, with the FPGA processing echo signals to compute distances. Tests were performed across 50 trials per distance to ensure statistical reliability. The buzzers activation (2 kHz tone) and LED status were monitored, and the seven-segment display output was recorded. Environmental factors, such as ambient noise and temperature (25°C), were controlled to minimize interference.
Figure 7: Hardware prototype of the ThirdEye blind stick.
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Performance Metrics
The system achieved a detection accuracy of 95% across all tested distances, with a response time of 50 ms. At 5 cm, the buzzer and LED 0 were activated consistently, indicating immediate obstacle proximity. At 20 cm, two LEDs were lit, and the buzzer remained active. At 40 cm, all LEDs were on, with the buzzer off, signaling a safe distance. The seven-segment display accurately showed distances in centimeters. Table 3 summarizes the performance metrics.
Table 3: Performance Metrics of the ThirdEye System
Distance (cm)
LED Status
Buzzer Status
Accuracy (%)
5
LED 0 ON
ON
95
20
LEDs 0-1 ON
ON
96
40
All LEDs ON
OFF
98
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Simulation Validation
Simulation in Xilinx Vivado validated the Verilog modules functionality. The testbench simu-lated echo durations corresponding to 540 cm distances, confirming accurate FSM transitions and distance calculations. The waveform (Figure 5) showed proper trigger pulse timing (10 µs), echo signal processing, and output signals for the buzzer and display. The simulation verified resource efficiency, with 10% LUTs and 5% flip-flops utilized.
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Comparative Analysis
Compared to microcontroller-based blind sticks, the ThirdEye System reduces latency by 30% due to the FPGAs parallel processing. Microcontroller systems typically exhibit 100150 ms response times, while ThirdEye achieves 50 ms, enabling faster obstacle detection in dynamic environments. The systems 40 cm detection range is optimized for close-proximity obstacles, though it is limited compared to some systems with
100 cm ranges. Environmental noise occasionally caused minor inaccuracies (e.g., 23 cm deviations), suggesting the need for noise filtering in future iterations.
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Limitations
The systems 40 cm detection range limits its ability to detect distant or overhead obstacles. Ambient noise, such as echoes in confined spaces, can affect sensor accuracy. Power consump-tion, while efficient, requires optimization for prolonged battery-powered use. Future enhance-ments include integrating infrared sensors for multi-directional detection and improving noise robustness.
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CONCLUSION AND FUTURE SCOPE
The ThirdEye System represents a significant advancement in assistive technology for visually impaired individuals, delivering a high-performance blind stick powered by the EDGE Artix-7 FPGA and HC-SR04 ultrasonic sensor. By achieving 95% detection accuracy and a 50 ms response time, the system ensures reliable real-time obstacle detection within a 40 cm range, outperforming traditional white canes and microcontroller- based solutions. The FPGAs paral-lel processing reduces latency by 30% compared to existing systems, while its reprogrammable architecture enables cost-effective scalability. The integration of a buzzer for alerts and a seven-segment display for distance visualization enhances user safety and independence, addressing the global challenge of visual impairment with an accessible and innovative solution.
Looking ahead, the ThirdEye System can be enhanced by incorporating a camera module to expand its functionality. Camera-based navigation will enable real-time environmental map-ping and path planning, improving mobility in complex settings. Image processing algorithms, implemented on the FPGA, will analyze the camera feed to provide detailed scene understand-ing. Currency detection will assist users in identifying banknotes during financial transactions, promoting economic independence. Face recognition capabilities will allow the system to iden-tify familiar individuals, facilitating social interactions. Object detection will classify obstacles or items, such as doors or chairs, enhancing environmental awareness. Additionally, integrating AI- driven algorithms for these features will leverage the FPGAs computational power. Future work includes optimizing power consumption for battery-operated portability and conducting extensive user testing in diverse indoor and outdoor environments to ensure robustness and usability.
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ACKNOWLEDGEMENT
We express our heartfelt gratitude to our faculty advisors and mentors at SSIT Pvt Ltd for their invaluable guidance and technical expertise throughout the development of the Third Eye System. We sincerely thank SSIT Pvt Ltd for providing essential resources, including FPGA hardware and laboratory facilities, which were critical to the projects success. We are grateful to our team members and peers for their collaboration, constructive feedback, and assistance during testing and prototype development. Additionally, we acknowledge the unwavering sup-port and encouragement from our families and friends, which motivated us to overcome chal-lenges and complete this work. Their collective contributions were instrumental in realizing this innovative blind stick for visually impaired individuals.
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