Nanotechnology – NRAM (Nano Random Access Memory)

DOI : 10.17577/IJERTCONV2IS01029

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Nanotechnology – NRAM (Nano Random Access Memory)



containing elements, nanotubes, are so small, NRAM technology will

Abstract NRAM (Nano Random Access Memory), is one of the important applications of nanotechnology. This paper has been prepared to cull out answers for the following crucial questions:

What is NRAM? What is the need of it?

How can it be made possible?

What is the principle and technology involved in NRAM? What are the advantages and features of NRAM?

The world is longing for all the things it can use within its palm. As a result nanotechnology is taking its head in the world. Much of the electronic gadgets are reduced in size and increased in efficiency by the nanotechnology. The memory storage devices are somewhat large in size due to the materials used for their manufacture. To reduce the size of the memory devices and to increase its storage capacity a 1000 times, the type of devices called NRAMs is emerging. The future rams will be NRAMs and the devices which use them will be tiny in size and powerful in its efficiency and storage.

Nanotechnology deals with the study of nano sized particles. With the study of nano size particles, devices and composites, we will find ways to make stronger materials, detect diseases in the bloodstream, build extremely tiny machines, generate light and energy and purify water. The most fascinating application of Nanotechnology is that to make Nano sized switches to store information. The memory needs of the contemporary world have increased dramatically. Fulfilling these needs, a constant work to improve the capacities of todays memory devices is in progress. The maximum available semiconductor RAM in common use is of 1GB. Even this could not fill the growing memory desire of todays users. As a result a nonvolatile, fast and vast RAM has been built with the combination of semiconductor and nanotechnology, named as NRAM (Nano RAM).

The main objective of this paper is to show how NANOTECHNOLOGY comfortably mingles with the existing semiconductor technology to from a sup erior RAM, which is nonvolatile, vast and economical, both, in price and power consumption .

An effort, to explain why and how the NanoRAMs are superior to the existing forms of RAM devices, is made in the introductory part. This paper also includes the design and description of the NanoRAM, followed by its advantages and disadvantages. As the CARBON NANOTUBE forms the heart of these devices , a short notes is also added to introduce the CARBON NANOTUBEs. Efforts are also made to include a small comparison between the NanoRAM and other possible RAM technologies which claim themselves Universal as that of NanoRAM.


NRAM, short for nano-RAM or nanotube-based/nonvolatile random access memory, is a new memory storage technology owned by the company Nantero. The technology blends together tiny carbon nanotubes with conventional semiconductors. Because the memory-

achieve very high memory densities: at least 10-100 times our current best. NRAM will operate electromechanically rather than just electrically, setting it apart from other memory technologies as a nonvolatile form of memory, meaning data will be retained even when the power is turned off. The creators of the technology claim it has the advantages of all the best memory technologies with none of the disadvantages, setting it up to be the universal medium for memory in the future.


Nantero's technology is based on a well-known effect in carbon nanotubes where crossed nanotubes on a flat surface can either be touching or slightly separated in the vertical direction (normal to the substrate) due to Van der Waal's interactions. In Nantero's technology, each NRAM "cell" consists of a number of nanotubes suspended on insulating "lands" over a metal electrode. At rest the nanotubes lie above the electrode "in the air", about 13 nm above it in the current versions, stretched between the two lands. A small dot of gold is deposited on top of the nanotubes on one of the lands, providing an electrical connection, or terminal. A second electrode lies below the surface, about 100 nm away.

Normally, with the nanotubes suspended above the electrode, a small voltage applied between the terminal and upper electrode will result in no current flowing. This represents a "0" state. However if a larger voltage is applied between the two electrodes, the nanotubes will be pulled towards the upper electrode until they touch it. At this point a small voltage applied between the terminal and upper electrode will allow current to flow (nanotubes are conductors), representing a "1" state. The state can be changed by reversing the polarity of the charge applied to the two electrodes.

What causes this to act as a memory is that the two positions of the nanotubes are both stable. In the off position the mechanical strain on the tubes is low, so they will naturally remain in this position and continue to read "0". When the tubes are pulled into contact with the upper electrode a new force, the tiny Van der Waals force, comes into play and attracts the tubes enough to overcome the mechanical strain. Once in this position the tubes will again happily remain there and continue to read "1". These positions are fairly resistant to outside interference like radiation that can erase or flip memory in a conventional DRAM.

NRAMs are built by depositing masses of nanotubes on a pre- fabricated chip containing rows of bar-shaped electrodes with the slightly taller insulating layers between them. Tubes in the "wrong" location are then removed, and the gold terminals deposited on top. Any number of methods can be used to select a single cell for writing, for instance the second set of electrodes can be run in the opposite direction, forming a grid, or they can be selected by adding voltage to the terminals as well, meaning that only those selected cells have a total voltage high enough to cause the flip.

Currently the method of removing the unwanted nanotubes makes the system impractical. The accuracy and size of the epitaxy machinery is considerably "larger" that the cell size otherwise possible. Existing experimental cells have very low densities compared to existing systems, some new method of construction will have to be introduced in order to make the system practical.


    Carbon nanotubes are small tubes of carbon atoms, only a few nanometers wide — 1/100,000th the width of a human hair. The wall of a carbon nanotube is composed of a single carbon atom. Nanotubes are as rigid as diamond and conduct electricity as well as copper. In recent years, the cost of mass- producing nanotubes has plummeted.

    By creating a thin "fabric" of nanotubes and arranging them in junctions on a silicon wafer embedded with conventional circuitry, a hybrid electro-mechanical memory system can be created. A nanotube configured in one position would indicate a 1, and in another position could indicate a 0. Manufacturing begins when a thin layer of nanotubes are spread across the surface of the wafer, then functionally unnecessary nanotubes are removed using conventional lithography techniques.

    Mass-produced NRAM could supplant DRAM (dynamic RAM), SRAM (static RAM), flash memory, and eventually hard disk storage itself. It will lead to "instant-on" computers, and PDA-sized devices with upwards of10GB of memory. Because nanotubes are so sturdy and the basis underlying their operation is mechanical, NRAM devices would be highly resistant to wear and tear, including heat, cold, and magnetism. They would also lead to instant-on devices and replace two popular types of RAM in use today — flash RAM and DRAM. Because the functional elements in NRAM technology are nanometer-sized, NRAM qualifies as nanotechnology in the general sense, but not molecular nanotechnology (molecular manufacturing), because the nanometer-sized elements are not capable of manufacturing additional products to atomic precision.

    The Bits Are Nanotubes

    An NRAM 0 or 1 bit is determined by whether the tubes are straight up or bent down. Changing the charge on the electrode changes the data state (0 or 1) by attracting or repelling the positively charged nanotube. When straight up, the tubes have high resistance; when bent down, they have low resistance. The distance between up and down is 1/10,000 of a human hair.

    Spin Coat the Tubes onto the Wafer

    Making NRAM cells is quite fascinating. A solution of purified carbon nanotubes is placed onto a wafer with predefined round electrodes and spun at centrifugal force to spread the fluid. The tubes wind up in random polarizations, spread evenly across the wafer and over the electrodes. Subsequent steps remove the extraneous tubes and add the interconnects. Each electrode with its carbon tubes becomes a memory cell (see below).

    Manufacturing a nanotube is dependent on applied quantum chemistry, specifically, orbital hybridization. Nanotubes are composed entirely of sp2 bonds, similar to those of graphite. This bonding structure, stronger than the sp3 bonds found in diamond, provides the molecules with their unique strength. Nanotubes naturally align themselves into "ropes" held together by Van der Waals forces. Under high pressure, nanotubes can merge together, trading some sp2 bonds for sp3 bonds, giving great possibility for producing strong, unlimited-length wires through high-pressure nanotube linking.

    Making the NRAM Cells

    Only two cells are shown here to illustrate the concept; however, billions of cells are created on a wafer, and many, many more tubes land over each electrode.


    Conceptually, the nanolithography method is quite simple.

    It is the process by which molecules of virtually any material are literally drawn onto virtually any smooth surface. The basis of this idea was first accepted over 4,000 years ago, when a quill pen was dragged across a piece of paper to deposit ink. A major difference between these two processes, however, is that quill-drawn lines are more than 1,000,000 times larger those drawn by the nanolithography process, which can be smaller than 10nm wide. We reasoned that, when you get down to it, drawing is simply building, but at a very small scale. Therefore, nanolithography could have great value as a method of ultra-small, or nano-scale, manufacturing.


    Based on the excellent properties of carbon nanotube, a start up company, called Nantero, invented a novel high performance carbon nanotube based memory, called, NRAM. This figure illustrates the structure of NRAM. Similar as traditional memory, it is a two dimensional array of cells and each cell stores one bit data. As for one cell, it is composed of a bundle of nanotubes, the metal support and electrode. The suspended nanotubes are mechanically bent or not determine the on/off states of the cell.

    NRAM works by balancing the nanotubes on ridges of silicon. Under differing electric charges, the tubes can be physically swung into one of two positions representing one and zero. Because the tubes are so smallunder a thousand of atomsthis movement is very fast and needs very little power, and because the tubes are a thousand times as conductive as copper it is very easy to sense their position to read back the data. Once in position, the tubes stay there until a signal resets them: with a tensile strength twenty times than of a steel, they are expected to survive around a trillion write cycles.

    The bit itself is not stored in the nanotube, but rather is stored as the position of the nanotube. Up is bit one, down is bit zero. Bits are switched betwee states through the application of electrical fields.

    The technology works by changing the charge placed on a lattice work of crossed nanotubes. By altering the charges, engineers can cause the tubes to bind together or separate, creating the ones and zeros that form the basis of computer memory. If we have two nanotubes perpendicular to each other, one is positive and another is negative, they will bent together and touch. If we give both of them similar charges, they will repel. These two different states allow us to store information as ones and zeroes with the up position representing a one and the down position representing a zero. The chip stays in the same state until you make another change in the electric field. So when you turn the computer off, it doesnt erase the memory. We can keep all your data in the RAM and it gives your computer an instant boot.

    Reading from the NRAM is done by measuring the resistance between the nanotube and the electrode below. If the nanotube is up, you obviously have a vastly different resistance than if the nanotube is down and touching the electrode. So if the resistance is very high, the stored bit is one, otherwise zero.



Then how the reconfiguration is performed? The figure shows the detail structure of NRAM. Each cell contains one bit and can be separately addressed by the word line and bit line. Whether the cell stores a 1 or 0 determines the high or low voltage at the output. Only during initialization, the reconfiguration bits will be written into the cells. Then during run-time reconfiguration, a reconfiguration copy will be read out from NRAM cells and put into the SRAMs to support the current computation or connectivity. Then lets look at the reconfiguration overhead. First, the reconfiguration time is short, only around 160ps. That means there is almost no delay overhead. Then consider about the area overhead, assume there are 16 reconfiguration sets in the NRAM and we use 100nm technology for CMOS logic and 100nm nanotube length, through Layout the LB including the periphery interconnect, the area overhead is around 20.5% per LB. However, the logic density improves nearly k-fold. Here logic density is defined as, give an amount of area, if there are 16 reconfiguration copies. It can implement 16 times more logic than the original. Then counting the area overhead, logic density is the logic the effective area can implement. We can see that with a relative low overhead, we can gain large logic density improvement. The capacity of NRAM, parameter k, is very important. Too large k will waste area and too small k will affect performance. The optimal k value can be obtained through design space exploration.


NRAM has a density, at least in theory, similar to that of DRAM. DRAM consists of a number of capacitors, which are essentially two small metal plates with a thin insulator between them. NRAM is similar, with the terminals and electrodes being roughly the same size as the plates in a DRAM, the nanotubes between them being so much smaller they add nothing to the overall size. However it seems there is a minimum size at which a DRAM can be built, below which there simply not enough charge is being stored to be able to effectively read it. NRAM appears to be limited only by the current state of the art in lithography. This means that NRAM may be able to become much denser than DRAM, meaning that it will also be less expensive; if it becomes possible to control the locations of carbon nanotubes at the scale the semiconductor industry can control the placement of devices on silicon.

Additionally, unike DRAM, NRAM does not require power to "refresh" it, and will retain its memory even after the power is removed. Additionally the power needed to write to the device is much lower than a DRAM, which has to build up charge on the plates. This means that NRAM will not only compete with DRAM in terms of cost, but will require much less power to run, and as a result also be much faster (write performance is largely determined by the total charge needed). NRAM can theoretically reach performance similar to SRAM, which is faster than DRAM but much less dense, and thus much more expensive.

In comparison with other NVRAM ("Non-Volatile RAM") technologies, NRAM has the potential to be even more advantageous. The most common form of NVRAM today is Flash RAM, which combines a bistable transistor circuit known as a flip-flop (also the basis of SRAM) with a high-performance insulator wrapped around one of the transistor's bases. After being written to, the insulator traps electrons in the base electrode, locking it into the "1" state. However, in order to change that bit the insulator has to be "overcharged" to erase any charge already stored in it. This requires high voltage, about 10 volts, much more than a battery can provide. Flash systems thus have to include a "charge pump" that slowly builds up power and then releases it at higher voltage. This process is not only very slow, but degrades the insulators as well. For this reason Flash has a limited lifetime, between 10,000 and 1,000,000 "writes" before the device will no longer operate effectively.

NRAM potentially avoids all of these issues. The read and write process are both "low energy" in comparison to Flash (or DRAM for that matter), meaning that NRAM can result in longer battery life in conventional devices. It may also be much faster to write than either, meaning it may be used to replace both. A modern cell phone will often include Flash memory for storing phone numbers and such, DRAM for higher performance working memory because flash is too slow, and additionally some SRAM in the CPU because DRAM is too slow for its own use. With NRAM all of these may be replaced, with some NRAM placed on the CPU to act as the CPU cache, and more in other chips replacing both the DRAM and Flash.


NRAM is one of a variety of new memory systems, many of which claim to be "universal" in the same fashion as NRAM — replacing everything from Flash to DRAM to SRAM.

The only system currently ready for commercial use is ferroelectric random access memory (FRAM or FeRAM). FeRAM adds a small amount of a ferro electric material in an otherwise "normal" DRAM cell, the state of the field in the material encoding the bit in a non-destructive format. FeRAM has all of the advantages of NRAM, although the smallest possible cell size is much larger than for NRAM. FeRAM is currently in use in a number of applications where the limited number of writes in Flash is an issue, but due to the massive investment in Flash factories (fabs), it has not yet been able to even replace Flash in the market.

Other more speculative memory systems include MRAM and PRAM. MRAM is based on a magnetic effect similar to that utilized in modern hard drives, the memory as a whole consisting of a grid of small magnetic "dots" each holding one bit. Key to MRAM's potential is the way it reads the memory using the magneto -restrictive effect, allowing it to read the memory both non -destructively and with very little power.

Unfortunately it appears MRAM is already reaching it's fundamental smallest cell size, already much larger than existing Flash devices. PRAM is based on a technology similar to that in a writable CD or DVD, using a phase – change material that changes its magnetic or electrical properties instead of its optical ones. PRAM appears to have a small cell size as well, although current devices are nowhere near small enough to find if there is some practical limit.


  • Non-volatile nanotube random-access memory (NRAM)

  • Mechanically bent or not: determines bistable on/off states

  • Fully CMOS-compatible manufacturing process

  • Prototype chip: 10 Gbit NRAM

  • Will be ready for the market in the near future

    Properties of NRAMs

  • Non-volatile

  • Similar speed to SRAM

  • Similar density to DRAM

  • Chemically and mechanically stable

    NATURE not tied to NRAMs

  • Phase change RAM

  • Magneto resistive RAM

  • Ferroelectric RAM


Nanotubes, atomic-scale carbon based structures, are set to begin the migration from the lab into the wafer fab. In the first effort of its kind, the Institute of Electrical and Electronics Engineers (IEEE) has begun to develop a standard that will define electrical test methods for individual nanotubes. The standard will seek to establish a common metrics foundation for the many research programs underway on the use of nanotubes in electronics.

The standard, IEEE P1650 (TM), Standard Test Methods for Measurement of Electrical Proper ties of Carbon Nanotubes, will recommend the tools and procedures needed to generate reproducible electrical data on the structures. The initial meeting of the IEEE P1650 Working Group will be held at IEEE head quarters in Piscataway, NJ, US in September.

The efforts applied in nanotechnology have surfaced a strong need for common ways to evaluate the electrical characteristics of nanotubes, so what is done by one group can be confirmed by others. The standard will seek to meet this need. The tests defined in the standard will help form a bridge between the lab and the production.


Universal memory…..

Introduction of NRAMs into the architecture enables cycle-by-cycle reconfiguration and logic folding

Choice of different folding levels allows the flexibility of performing area-performance trade-offs

Logic density and area-time product improved significantly

Can be very useful for cost-conscious embedded systems and future FPGA improvement

Though this technology today is limited to laboratories and not economically viable, some new method of construction will have to be introduced in order to make the system practical. Once this is d one we can see the enabling of instant-on computers, which boot and reboot instantly with un-imaginable memory sizes , as well as highdensity portable memory – MP3 players with 1000s of songs, PDAs with 10 gigabytes of memory, high-speed network servers and much more.


The Emergence of Practical MRAM http://www.crocus- rticleID=218000269

The incredible shrinking Nanotube Memory-E.F.Y magazine.

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