Mitigation Of Voltage Sag And Current Harmonic Elimination Using Reference Signal Generation Method Based On UPQC

DOI : 10.17577/IJERTV2IS4962

Download Full-Text PDF Cite this Publication

Text Only Version

Mitigation Of Voltage Sag And Current Harmonic Elimination Using Reference Signal Generation Method Based On UPQC

K. Vasantha Sena

PG Scholar, Department of EEE, SRM University, Chennai.

Subhransu Sekhar Dash

Professor and Head, Department of EEE SRM University, Chennai.


This paper proposes a reference signal generation method for the UPQC adopted to compensate both current and voltage quality problems of sensitive loads. The shunt converter eliminates current harmonics originating from load side and series converter eliminates voltage sag originating from the supply side. The developed algorithm for the shunt controller and series controller for reference signal generation is based on Instantaneous Reactive Power Theory and nonlinear adaptive filter (phased-locked loop). The DC link control strategy is based on PI controller. The proposed UPQC mitigates the effects of voltage sag and suppresses the load current harmonics under distorted supply conditions. The proposed system is tested through simulation studies using MATLAB/SIMULINK environment.

Index Terms: Power Quality (PQ), Reference signal generation, PI controller, IRPT, Unified Power Quality Conditioner (UPQC).

  1. Introduction

    Power Quality issues are becoming more and more significant in these days because of the increasing number of power electronic devices that behave as nonlinear loads. With the increasing applications of nonlinear and electronically switched devices in distribution systems and industries, Power Quality (PQ) problems, such as harmonics, flicker and imbalance have become serious concerns. In addition, lightening strikes on transmission lines, switching of capacitor banks, and various network faults can also cause PQ problems, such as transients, voltage sag/swell, and interruption [1].

    One of the electrical system adapter structures is back to back inverter. According to the controlling structure, back to back inverters might have different operations in compensation. UPQC is a combination of shunt (Active Power Filter) and a series compensator (Dynamic Voltage Restorer) connected together via a

    common DC link capacitor, which facilitates the sharing of the active power.

    The application of UPQC is to compensate the sag, swell and unbalanced voltage, reactive power, current harmonics and voltage harmonics through shunt and series voltage source inverter. Voltage Source Converter (VSC) based custom power devices are increasingly being used in custom power applications to mitigate these PQ problems in power distribution system. The series active power lter mitigate voltage waveform distortion such as harmonics, icker, sag and swell. The shunt active power lter compensate current distortions like harmonics and phase displacement of the load current from the system voltage [3].

    Control techniques play a vital role in the overall performance of the power conditioner [4]. Instantaneous power theory is generally preferred to generate reference signals for the shunt converter [2] [5]. The adaptive detection technique is used to minimize the effects of noise or parameter variation [6]. To generate reference signals simultaneously for series and shunt converter, abc-dq transform, wavelet transform [7] etc methods are employed. DC voltage control can be fulfilled by proportional control and PI control [8]. The hysteresis method, space vector Pulse Width Modulation (PWM) [9] and sinusoidal PWM strategy are preferred for series and shunt side converter signal generation.

    A comprehensive control strategy for UPQC should be accurate, fast and simple in generation of reference waveforms for series and shunt active power lters. Inaccurate waveforms cause additional power quality problems. When the speed of its response decreases, the switching power loss increases, the capacitor voltage oscillation also increases so the compensator operation may become unstable.

  2. Power Circuit Configuration of UPQC

    The UPQC shown in Fig.1 consists of series and shunt converter that are connected back to back through common energy storage capacitor (CDC). Dynamic Voltage Restorer (DVR) is connected through

    transformers between the supply and Point of Common Coupling (PCC). Active Power Filter (APF) is connected in parallel with PCC through the transformers. The main objective of DVR is to mitigate voltage sag from the supply side. The ac filter inductor Lf and capacitor Cf are connected in each phase to prevent the flow of harmonic currents generated due to switching [3]. The objective of APF is to regulate the dc link voltage between both converters and to suppress the load current harmonics [2]. The switching devices in both the converters are Insulated Gate Bipolar Transistor (IGBT) with anti parallel diodes. CDC provides the common dc link voltage to DVR and APF.

    Fig.1 Schematic diagram of UPQC.

  3. Control Strategies of UPQC

    The control strategy of UPQC consists of APF and DVR controller. DVR controller measures the supply voltages to generate the required compensation and sag/swell detection signals. These signals are then compared in PWM controller and the required gate signals are generated. APF controller measures the load voltages, capacitor voltage, load currents and injected currents. The controller algorithm of APF processes the measured values and generates the required compensation signals. These signals are then compared with hysteresis controller and the required gate signals are generated.

    1. Control Algorithm for DVR

      The control system of DVR performs voltage measurements, sag detection, reference voltage extraction and gate signal generation. Fig. 2 shows the control algorithm of series converter for phase A. The control algorithm is identical for the other phases.

      Fig. 2. Control block diagram of DVR.

      1. Reference Voltage Generation

        The reference voltage computation of DVR is based on the nonlinear adaptive filter [6]. This filter can be used as a PLL. The block diagram of the proposed algorithm is shown in Fig. 3. The proposed algorithm is derived from the findings of both enhanced PLL and nonlinear adaptive filter. The proposed controller minimizes the mathematical operands in the system and reduces complex parameter tuning. The measurements of supply voltages are required for the control strategy of DVR. The system receives the measured input signal A(t) and B(t), the difference of input and the synchronized fundamental component; C(t), the amplitude of D(t); D(t), the synchronized fundamental component; E(t), PLL signal; (t), the phase angle of D(t). For series inverter, A(t) corresponds to supply voltage VS and E(t) corresponds to VPLL_S. The required compensation signal Verr_s is obtained from (VPLL_S VS). C(t) corresponds to Vamp_s and this signal is used to detect voltage sags.

        For series inverter, A(t) corresponds to supply voltage VS and E(t) corresponds to VPLL_S. The required compensation signal Verr_s is obtained from (VPLL_S VS). C(t) corresponds to Vamp_s and this signal is used to detect voltage sags.

        Fig. 3. Block diagram of the proposed algorithm.

      2. Proposed Sag Detection Method

      With the proposed fault detection method, the

      v 1

      1 1

      2 2 v

      controller is able to detect balanced and unbalanced


      3 3 La


      voltage sags without an error. C(t) gives the amplitude

      v 0



      2 2 Lb

      of the tracked signal A(t). For example, if the amplitude


      3 1 1

      1 v

      of the measured Phase A supply voltage is 220V, C(t)



      2 2


      signal is obtained as 1p.u. If the amplitude falls to 176V, the amplitude of the C(t) signal falls to 0.8p.u. The voltage sag detection method is based on E-PLL method which is presented in Fig. 4. By subtracting the C(t) signal from the ideal voltage magnitude (1p.u), the

      Where ila, ilb, ilc are the load currents and Vla, Vlb, Vlc are the load voltages.

      According to the p-q theory, the active, reactive and zero-sequence powers are defined as in Eq. (4), Eq. (5) and Eq. (6).

      voltage sag depth Sprop can be detected as in Eq. (1).

      p v i v i


      Sprop 1


      q v i v i

      p0 v0i0



      Fig. 4. Proposed sag detection method

      The currents, voltages and powers in the – system can be decomposed in mean and alternating values, corresponding to the fundamental and harmonic components, as in Eq. (7), where x can be currents, voltages and powers.

      The voltage compensation signal Verror is compared

      x x ~x


      with a fixed frequency carrier wave to generate the firing pulses as PWM signals. Sinusoidal PWM control technique is used to generate the gate switching pulses of DVR.

    2. Control Algorithm of APF

      The control system of APF performs reference

      Zero sequence power (p0) only exists in three-phase system with neutral wire. p and ~p are the DC and

      AC components of the instantaneous real power and

      q and q~ are the DC and AC components of the

      instantaneous imaginary power. The power required to be compensated by the APF are calculated as in Eq.

      current extraction, capacitor voltage balance control and generation of gating signals. APF controller


      ~p v

      v ~ 0



      0 i


      measures the load voltage, capacitor voltage, load



      v i

      currents and injected currents. The controller algorithm

      q 0

      0 i

      of APF processes the measured values and generates the required compensation signals. These signals are then compared in hysteresis controller and the required gate signals are generated. The algorithm for reference current generation is based on the Instantaneous

      After adding the active power required to regulate the DC bus voltage, ploss to the alternative value of the instantaneous real power, the reference currents *



      are calculated by Eq. (9).

      Reactive Power Theory [10].


      1 0

      1 ~p p


      T T


      The control system of traditional APF is shown in Fig. 5. Three-phase load voltages, DC capacitor voltage, load currents and injected currents are the input for the control system. The capacitor voltage is



      q q~

      v 2 v 2

      controlled using PI controller.

      This theory consists in the algebraic transformation of the current and voltage of the system from the abc system to 0 system using Clarke`s transformation as







      in the Eq. (2) and Eq. (3).

      The load currents are transformed from three-phase abc

      i 1

      1 1



      2 2 i

      to 0 components using Clarke`s transformation, as in



      i 0

      3 3 La

      2 2 Lb


      Eq. (10).

      i 3 1 1

      1 i




      2 2

      1 0



      2 i (10)

      a 2







      3 2

      3 1

      2 2



      1 3





      2 2

      Fig. 5. Control system of traditional APF.

      The most important disadvantage of IRPT theory is that voltage harmonics in supply voltage (so load voltages) result in increased THD content. This can cause the incorrect calculation of reference current. To overcome this problem, only one load voltage measurement is performed. With the use of the measured value, 90º phase shifted virtual voltage is generated as shown in Fig. 6. The generation of this virtual voltage depends on the detection of zero crossing of phase-to-phase voltage of A and B phases.

      With the zero crossing detection, frequency compensation is made on virtual voltage. The unbalances between measured load voltages are eliminated using this control approach as in Eq. (11) and Eq. (12).

      V Vab (11)

      V Vab 90 (12)

      Fig. 6. Proposed APF controller.

      These signals are then compared in hysteresis controller and the required gate signals are generated.

      C. DC Capacitor Voltage Regulator



      Due to switching loss, transformer loss and active power ow between shunt and series part of UPQC during sag and swell, voltage of the DC capacitor changes. To maintain DC voltage constant, the shunt part of UPQC should interchange active power with power network. To reach this goal the difference between reference voltage VDC , and actual voltage, VDC of the DC capacitor is fed into a PI controller to calculate the amplitude of the extra active current which must be drawn from network. This current must be in phase with the network voltage to generate the active power, so the calculated amplitude is multiplied by three-phase load voltages. So the resulting current iDC, has proper phase and amplitude and can maintain VDC constant. The DC voltage regulator is shown in Fig. 7. This active current component is added to the reference waveform. The resulting waveform is fed into a hysteresis controller to obtain the ring pulses for semiconductor switches of shunt active power lter.

      A PI controller is used to compensate DC link capacitor voltage if APF is in compensation state. The instantaneous active power is calculated by using the transformed values and they are applied to a 100Hz digital low pass filter.

      The instantaneous active and reactive currents are calculated using Eq. (9). The feedback method used to control DC bus is very important. The method consists of controlling the capacitor voltage to a reference value. To achieve this, a PI control may be chosen for the error between the reference value and the capacitor voltage value at the end of each period.

      ierr = iref if (13)

      Fig.7. DC voltage regulator block diagram

  4. Simulation Results and Discussion

    Simulation results of the UPQC system for power quality improvement are tested through case studies using MATLAB/SIMULINK software. This section is divided to three cases in which Case 1: nonlinear loads connected to the grid and its effect on source side. Fig.8 shows the Matlab/Simulink Model of nonlinear loads connected to grid. Universal bridge is considered as non linear load. Universal bridge diodes are considered since every power electronic device is the cause of

    harmonics. A three-phase diode bridge rectifier is used as a harmonic current producing load with a total harmonic distortion (THD) of 31%.

    Case 2: Fig. 11 shows the Matlab/Simulink Model of UPQC. The harmonic suppression capability of APF is analyzed. The supply voltage and load voltage waveforms before and during the voltage sag are presented. The harmonic suppression capability of APF is analyzed.

    Fig. 8. Matlab/Simulink model of nonlinear loads connected to grid.

    Fig. 9. Simulation results ofnonlinear loads connected to grid

    Fig. 9 shows the sinusoidal source voltage and non sinusoidal source currents. Three-phase source currents are influenced by nonlinear load.

    Fig. 10 shows the harmonic spectrum and THD value is observed to be 31.02% of fundamental.

    Fig. 10. Total harmonic distortion without UPQC.

    Fig. 11. Matlab/Simulink Model of UPQC.

    Fig. 12. Simulation results of compensated load current.

    Fig. 12. shows how APF overcomes the load current harmonics with the proposed control algorithm. A nonlinear load current with 22% THD is approximately reduced to 3.88% with a PI controller as shown in Fig. 13.

    Fig. 13. Total harmonic distortion of source current.



    Fig. 14. Matlab/Simulink result of (a) source voltage during sag (b) compensated source voltage.

    Fig. 14 shows the supply and load voltage waveforms during voltage sag, when the sag signals are applied from time period 0.2 sec to 0.3 sec. The supply current THD is approximately reduced to 5% with the PI controller.

  5. Conclusion

The Unified Power Quality Conditioner is introduced and analyzed by the controlling voltage source converter (DVR and APF) based on Enhanced PLL and nonlinear adaptive filter algorithms and dc- link voltage with a PI controller. New functionality is added to the UPQC system to quickly extract the reference signals directly for load current and supply voltage with a minimal amount of mathematical operands. The computation method is simpler than for other control algorithms of reference extraction. The number of parameters to be tuned has also been reduced by the use of the proposed controller. The performance of the proposed UPQC and the controller for PQ improvement is tested through the case study simulations.

Bakhshai, An adaptive filter for synchronous extraction of harmonics and distortions, IEEE Trans. Power Del., vol. 18, no. 4, pp. 1350-1356, Oct. 2003.

  1. M. Forghani and S. Afsharnia, Online wavelet transform-based control strategy for UPQC control system, IEEE Trans. Power Del., vol. 22, no. 1, pp. 481-491, Jan. 2007.

  2. V. Khadkikar and A. Chandra, A new control philosophy for unified power quality conditioner (UPQC) to coordinate load-reactive power demand between shunt and series inverters, IEEE Trans. Power Del., vol. 23, no. 4, pp. 2522-2534, Oct. 2008.

  3. P. Zhu, X. Li, Y. Kang, and J. Chen, Control scheme for a universal power quality manager in a two-phase synchronous rotating frame, Proc. Inst. Elect. Eng., Gen. Transm. Distrib., vol. 151, no. 5, pp. 590-596, 2004.

  4. H. Akagi, Y. Kanazawa, A. Nabae, Generalized Theory of the Instantaneous Reactive Power in Three-Phase Circuits, IPEC'83 – Int. Power Electronics Conf., Tokyo, Japan, 1983, pp. 13751386.


  1. H. R. Mohammadi, A. Y. Varjani, and H. Mokhtari, Multiconverter unified power quality conditioning system MC-UPQC, IEEE Trans. Power Del., vol. 24, no. 3, pp. 1679-1686, Jul. 2009.

  2. H. Fujita and H. Akagi, The unified power quality conditioner: The integration of series and shunt active filters, IEEE Trans. Power Electron., vol. 13, no. 2, pp. 315-322, Mar. 1998.

  3. A. K. Jindal, A. Ghosh, and A. Joshi, Interline unified power quality conditioner, IEEE Trans. Power Del., vol. 22, no. 1, pp. 364-372, Jan. 2007.

  4. R. Rezaeipour and A. Kazemi, Review of novel control strategies for UPQC, Int. J. Elect. Power Eng., vol. 2, pp. 241-247, 2008.

  5. F. Z. Peng, G. W. Ott, and D. J. Adams, Harmonic and reactive power compensation based on the generalized instantaneous reactive power theory for three-phase four wire systems, IEEE Trans. Power Electron., vol. 13, no. 6, pp. 1174-1181, Nov. 1998.

  6. H. Karimi, M. K. Ghartemani, M. R. Iravani, and A. R.

Leave a Reply