fbpx

Interline DVR with Re duced Rating Control


Call for Papers Engineering Journal, May 2019

Download Full-Text PDF Cite this Publication

Text Only Version

Interline DVR with Re duced Rating Control

Mrs . N. Meenakshi Department of Electrical and Electronics Engineering Arasu Engineering college,

Kumbakonam,India

Abstract The DVR provides a technically advanced and economical solution to voltage sag and swell problems. As the voltage restoration process involves real power injection into the distribution system. A new technique is analyzed with the particular focus on minimizing the rating of the converter. The DVR is operated in this scheme with the Battery Energy Storage System. The above reduced rating technique is used in the Interline Dynamic Voltage Restorer which replenishes the DC link energy storage dynamically thereby eliminating the need of a energy source.

KeywordsBESS;DVR;DC link

I.INTRODUCTION

Modern power systems are complex networks, where hundreds of generating stations and thousands of load centers are interconnected through long power transmission and distribution networks. The main concern of consumers is the quality and reliability of power supplies at various load centers where they are located. Even though power generation in most of the well- developed countries is fairly reliable, the quality of the supply is not so reliable. Power distribution systems, ideally, should provide their customers with an uninterrupted flow of energy at smooth sinusoidal voltage at the contracted magnitude level and frequency. Power quality disturbances have been organized into seven categories based on wave shape such as Transients, Interruptions, Sag / Under voltage, Swell/Over voltage, Waveform distortion, Voltage fluctuations, Frequency variations. Custom power devices are mainly of three categories such as series-connected compensators known as dynamic voltage restorers (DVRs), shunt-connected compensators such as distribution static compensators, and a combination of series and shunt- connected compensators known as unified power quality conditioner.

Voltage sag is one of the most severe power quality disturbances to be dealt with by the industry sector in recent time. Even a short-duration voltage sag could cause a malfunction or a failure of a continuous process, thereby incurring heavy financial loss.

The amount of real and reactive power supplied by the DVR depends on the type of voltage disturbance, the protected load, and the magnitude and direction of injected voltage. The reactive power can be internally generated within the DVR while an energy storage is required to supply the real power.

Mr. K. Manivel M.E,(Asst prof) Department of Electrical and Electronics Engineering, Arasu Engineering college,

Kumbakonam,India.

  1. OPERATION OF DVR

    The schematic of a DVR-connected system is shown in Fig. 1(a). The voltage Vinj is inserted such that the load voltage Vload is constant in magnitude and is undistorted, although the supply voltage Vs is not constant in magnitude or is distorted shows the phasor diagram of different voltage

    Fig. 1. (a) Basic circuit of DVR. (b) Phasor diagram of the DVR voltage injection schemes.

    injection schemes of the DVR. VL(presag) is a voltage across the critical load prior to the voltage sag condition. During the voltage sag, the voltage is reduced to Vs with a phase lag angle of . Now, the DVR injects a voltage such that the load voltage magnitude is maintained at the pre-sag condition. According to the phase angle of the load voltage, the injection of voltages can be realized in four ways [19]. Vinj1 represents the voltage-injected in-phase with the supply voltage. With the injection of Vinj2, the load voltage magnitude remains same but it leads Vs by a small angle. In Vinj3, the load voltage retains the same phase as that of the pre-sag condition, which may be an optimum angle considering the energy source. Vinj4 is the condition where the the injected voltage is in quadrature with the current, and

    this case is suitable for a capacitor-supported DVR as this injection involves no active power . However, a minimum

    possible rating of the converter is achieved by Vinj1. The DVR is operated in this scheme with a battery energy storage system (BESS).

  2. INTERLINE DVR

    This paper presents a concept of interline dynamic voltage restoration (IDVR) where two or more voltage restorers are connected such that they share a common dc link. This is in a way similar to the interline power flow controller (IPFC) concept which is still under research for the compensation and effective power flow management of multiline transmission system [5]. In its general form, the IPFC employs a number of

    inverters with a common dc link to provide series compensation for a line of the transmission system. In a similar way, the IDVR system is formed by using several DVRs protecting sensitive loads in different distribution lines to share a common dc-link energy storage For an example, two different sensitive loads in an industrial park fed from two different feeders with different voltage levels can be protected from voltage sags by two DVRs employed in an individual feeder. However, dc links of these two DVRs could be connected to a common dc link to form an IDVR system. This would cut down on the cost of the custom power device, as sharing a common dc link reduces the dc-link storage capacity significantly compared to that of a system whose loads are protected by clusters of DVRs with separate energy storages. The injected voltage of the DVR depends on the accuracy and dynamic behavior of the pulse width modulated (PWM) voltage synthesis scheme and control system adopted.

    Fig. 2. circuit of IDVR.

    A. Energy Storage Requirement of a DVR

    The injection of an appropriate voltage in the face of up- stream supply voltage sag needs a certain amount of real and reactive power which must be supplied by the DVR. Supply of real power is met by means of an energy storage facility connected in the dc link. Large capacitors are used as a source of energy storage in most of the DVRs. Generally, capacitors are used to generate reactive power in an ac power system. However, in a dc system, capacitors can be used to store

    energy. When the energy is drawn from the energy storage capacitors, the capacitor terminal voltage decreases. Therefore, there is a minimum voltage below which the inverter of the DVR cannot generate the required voltage. Thus, the size of the dc capacitor needed to supply active power can be expressed as in (1) in terms of maximum allowable dc-link voltage , minimum allowable dc- link voltage , sag duration , and power loss

    . According to (1), it is clear that large capacitors in the dc- link energy storage are needed to effectively mitigate voltage sags of large depths and long durations unless they are unavoidable.

    (1)

    Consider the condition when one of the DVRs in the IDVR system operates in voltage-sag compensating mode while the other DVRs operate in power-flow control mode to keep the dc-link voltage at a desired level. To set up power-flow analysis of the two-feeder IDVR system , it is assumed that DVR1 in Feeder 1 operates in the voltage-sag compensation mode and DVR2 in Feeder 2 works in the power-flow control mode. When there is no voltage sag, the load voltage of Feeder 2 is equal to the bus voltage Vb2.Even in sag situations, the DVR2 should be operated to meet this condition while supplying real power to the common dc link. Hence, the locus of the Vl2 should lie on a circle with radius equal to the desired magnitude of bus voltage Vb2, as shown in Fig. 2. The load voltage (Vl2) has an advance phase angle with respect to the supply side voltage (Vb2), in order to injet power to the dc link. With the help of a phasor diagram in Fig. 2, the following expression can be derived for the real power exchange between the two feeders:

    Pex = Sl2 [cos(2 ) cos(2)] (2)

    where Sl2 = 3Vl2Il2 is Feeder 2 load apparent power, Vl2, Il2, and 2 are the Feeder 2 load voltage, current, and power-factor

    angle. According to (1), the real-power exchange depends on the advance angle , as the other parameters of (1) are constant for a given loading condition. Therefore, the maximum real power transfer is reached when is advanced, such that, it is equal to the load power-factor angle (i.e., = 2). In this condition, the supply side voltage is in phase with the Feeder 2 current. Thus,the maximum real power is given by (2)

    Pexmax = Sl2[1 pf2] (3)

    where max = 2 and pf2 = cos(2) is Feeder 2 load power factor. According to (2), the maximum value of the real-power transfer from the Feeder 2 to Load 1 is 20% of base load VA rating of Load 2 for a typical load power factor of 0.8. This amount of extra power can be transferred from Feeder 2 to Load 1 without stressing the feeder in short run.

    Fig. 3. Simulation circuit of IDVR with reduced rating control

    The real power exchange can also be expressed in terms of the real power imported by DVR1 and the system losses including converter switching losses, as follows:

    Pex = PDVR1 + Plosses. (4)

  3. MODELING AND SIMULATION The IDVR-connected system consisting of 2 feeders which are of three-phase supply, three- phase critical loads, and the series injection transformers shown in Fig. 2 is modeled in MATLAB/Simulink environment along with a sim power system toolbox and is shown in Fig.

    3. An equivalent load considered is a 1 k linear load. In the case of in-phase compensation the DVR current rating is of the order of 18A and is shown in fig 4. If the injected voltage is phase

    shifted by 50º the converter current is increased by 20A and is shown in figure 5. Thus the DVR rating is reduced by in-phase compensation.

    Fig. 4. Converter Current(In phase compensation) Since the converter current shown in the figure below is of high value, DVR rating which is to be used in the out of phase compensation will be more.

    Fig. 5. Converter Current(phase shifted by 50º)

    The harmonics are introduced at the load side by using the diode bridge rectifier shorted by the resistive branch and THD value is 29.96% as shown in figure 6.

    Fig. 7. Hormonic spectrum of the Input current

    The harmonics introduced are reduced by the DVR connected in series in the line thereby reducing the THD value to 4.51% as shown in fig 7.In the fig 8 , the voltage swell is introduced from 0.05sec to 0.1sec and voltage sag is introduced from 0.1sec to 0.15sec in the line1 voltage. Similarly the voltage swell is introduced from 0.2sec to 0.25sec and voltage sag is introduced from 0.25sec to 0.3sec in the line2 voltage.The simulation results indicate that the THD of output current is 29.96% and by using the IDVR the THD of the input current is reduced to 4.52%

  4. PERFORMANCE OF THE PROPOSED SYSTEM In the DVR system, the THD value of the

    injected voltage is found to be 24.89% in the DVR system. The converter current in the case of in phase compensation is reduced and thus the rating of the converter used in the IDVR is of reduced. In the IDVR system, the THD value of the injected voltage is of the order of 0.91%. Moreover battery is not required at the DC bus of the VSC. It is concluded that the voltage injection in-phase with the PCC voltage results in minimum rating of DVR without the cost of the battery at its DC bus.

    Fig. 6. Harmonic spectrum of the load current

    Fig. 8 Simulation Output of the proposed system

  5. CONCLUSION

The operation of the IDVR using reduced rating technique is analyzed. In this paper closed loop controlled three phases IDVR using reduced rating technique is modeled and simulated for sag, swell, and harmonics distortion condition

REFERENCES

  1. Pychadathil Jayaprakash, Bhim

    singh, D.P.Kothari, Ambrish Chandra, Kamal Al-Haddad Control of reduced-rating Dynamic Voltage Restorer with a Battery Energy Storage System, IEEE Trans. Ind. Appl., vol. 50, no. 2,March/April 2014

  2. D. M. Vilathgamuwa, H.M.Wijekoon, and

    S. S. Choi, A novel technique to compensate voltage sags in multiline distribution system The

    interline dynamic voltage restorer, IEEE Trans. Ind. Electron., vol. 53, no. 5,pp. 1603 1611, Oct. 2006.

  3. A. K. Jindal, A. Ghosh, and A. Joshi,Critical load bus voltage control using DVR under system frequency variation, Elect. Power Syst. Res., vol. 78, no. 2, pp. 255263, Feb. 2008.

  4. J. W. Liu, S. S. Choi, and S. Chen, Design of step dynamic voltage regulator for power quality enhancement, IEEE Trans. Power Del., vol. 18,no. 4, pp. 14031409, Oct. 2003. [5]C.Gopinath,

P.Sivaperumal, R.Ramesh, A.Peer Fathima, Design an Interline Dynamic Voltage Restorer for Voltage Sag Compensation using Z-source InverterIJEE vol. 4

N05(2011),pp. 541-554, 2011

  1. J.Singaravelan, Mohammad

    Abdul Kadher,K.SureshManic Simulation of Interline Dynamic Voltage Restorer IJEST vol. 3 No.8 August 2011

  2. J. G. Nielsen and F. Blaabjerg, A detailed comparison of system topologies for dynamic voltage restorers, IEEE Trans. Ind. Appl., vol. 41, no. 5,pp. 12721280, Sep./Oct. 2005.

Leave a Reply

Your email address will not be published. Required fields are marked *