FIR Filter Implementation using Matlab Fdatool and Xilinx Vivado

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FIR Filter Implementation using Matlab Fdatool and Xilinx Vivado

Rajesh Kumar Dwivedi1 and Raghav Dwivedi2 1Department of Physics, Christ Church College, Kanpur 2PG scholar, JIIT Noida

Abstract: Finite impulse filter is a filter structure that can be implemented at almost any sort of frequency digitally. An FIR filter can be implemented using a series of delays, multipliers, adders to create filter output. Although FIR Filter has been implemented successfully using various softwares but this paper is actually the implementation of n-tap or n-1 order FIR filter using Matlab Fdatool and Xilinx Vivado. The waveform on Xilinx Vivado is representation of output of FIR which we obtain On Matlab.

Keywords: Xilinx Vivado, Matlab Fdatool, FIR Filter.

Where

Fig.2: Low-pass digital filter specification

  1. INTRODUCTION

    Filters are signal conditioners each accept input signal and block some pre-specified frequency component and the output of the filter is the input signal minus the pre-specified frequency component. For example a typical phone line acts as a filter that limits frequencies considerably to the range of frequencies that the human can hear. A digital filter takes digital input, produce digital output and have digital components.

    Fir filter are the filter with finite response, they are also called as the recursive filter. Basic diagram of Fir filter is shown under fig. 1.

    • p normalized cut-off frequency in the pass band

    • s normalized cut-off frequency in the stop band

    • ap maximum ripples in the pass band

    • as- minimum attenuation in the stop band

    Similarly for the high-pass, band pass, band stop filter is shown in the following figures 3, 4, 5.

    Fig.3: High pass digital filter specification

    Fig.1

    Representation of digital filters

    It can be clearly seen iir filter has feedback while fir filter does not, thus fir filter are stable as compared to iir filter. Hence, fir filter are preferred over iir filter. In time domain digital filter is given by convolution sum:

    Fig.4: Band-pass digital filter specification

    For the band stop filter specification please refer to next

    =

    Y[n] =

    [][ ]

    diagram as follows

    An fir filter of order N is characterized by N+1 coefficients and in general requires N+1 multipliers

    And N two input adders. The following figure below show the specification of various fir filters which are the basic block for the Fir filter specification (fig.2).

    Fig.5: Band-stop digital filter Specification

    The Z-transform is performed using with discrete-time signals. It converts a discrete time-domain signal into a frequency-domain representation. It is very suitable for analysing discrete time signals and systems in dsp architectures. The z-transform is derived from the Fourier discrete time transformation and is considered the basic operation in digital filter design process.

    The Z-transform is defined as:

    () = ()

    =

    Fir filter can be implemented using various structures which are explained in the following sections.

    1. FIR DIRECT FORM

      Fig.6: Direct form realization of fir filter

      This is called direct form because it is direct implementation of the convolution, the number of delay is the order of filter, and hence this is also called canonical form. Fig.6 shows the structure of direct form fir, y[n] can be obtained from below given equation

      y[n]=h[0]x[n]+h[1]x[n-1]++h[n]x[n-N]=

      N

      h[k]x[k-n]

      k=0

    2. FIR CASCADED DIRECT FORM

      The transpose of the direct form shown above is represented in fig.7.

      Fig.7: Cascade direct form realization of fir

    3. FIR CASCADE FORM

      A cascade realization of fir filter with N=6 is shown in fig.8

      Fig.8: Cascade form realization of fir

      Each second-order section in the above structure shown in figure 8 can also be realized in the transposed direct form

    4. LINEAR PHASE FIR STRUCTURE

    The symmetry property of a linear phase fir filter can be accomplished to reduce the number of multipliers into almost half of that in the direct form implementation. Consider a length-7 type 1 fir filter; its symmetric impulse response is given as:

    () = h[0]+h[1]1 + [2]2 + [3]3 + [2]4

    + [1]5 + [0]6

    Rewriting H (z) we get

    () = [0](1 + 6) + [1](1 + 5)

    + [2](2 + 4) + [3]3

    We obtain the realization as shown below in fig.9

    Fig. 8 Linear Phase fir structure

    A similar decomposition can be applied to Type-2 Fir Filter transfer function.

  2. IMPLEMENTATION OF FIR FILTER

    The implementation of fir filter requires the basic three building blocks viz.

    1. Multiplication

    2. Adder

    3. Signal delay

      Building blocks of the fir filter can be shown in fig.9. Multiplier output is y[n] = x[n]

      Adder output is y[n] = x1[n] + x2[n]

      Fig.9: Basic building block of fir filter

      Delay output is y[n] = x [n-1]

      However DSP filter now uses MAC circuit for the multiplication followed by accumulation.

      Fig.10: MAC Circuit

      A typical MAC structure has been shown above in fig.10 it consists of multiplying two values, then adding the result to the previously accumulated value, which should be re-stored in the registers for future accumulations. Another feature of a MAC circuit is that it must check for overflow operation in the filter, when the number of MAC operations is large.

  3. MATLAB FDATOOL

    MATLAB FDATOOL is a filter design analysis tool used mainly to design the filter on MATLAB platform and then transforms it into corresponding VHDL code. In the following section are the steps how to configure the FIR filter on MATLAB.

    III.A GETTING STARTED WITH FDATOOL

      1. Type fdatool or filterDesigner at the MATLAB command prompt.

        >> fdatool

        Fig. 11 fdatool on MATLAB command window

      2. Filter design and analysis toolbox appear as shown in the figure 12

        Fig. 12: FDATOOL box in MATLAB

      3. In the Filter Design & Analysis Tool dialog box, check that the following filter options are set:

        Fig. 13: FDATOOL options in FDATOOL box

        These settings are for the default filter design that the Filter Designer creates for you. If you do not have to change the filter, and design filter is grayed out, you are done and can skip to quantize the Filter.

      4. If you modified options listed in step c, click Design Filter. The Filter Designer creates a filter for the specified design and displays the following message in the Filter Designer status bar when the task is complete.

        Designing Filter… Done.

        Quantize filters for HDL code generation. To quantize your filter,

      5. Open the basic FIR filter design you created in Design a FIR Filter in Filter Designer.

      6. Click the Set Quantization Parameters button in the left-side toolbar. The Filter Designer displays a Filter arithmetic menu in the bottom half of its dialog box.

    Fig.14: Quantizing the Filter in MATLAB

    e) Set the quantization parameters as shown in the figure below

    Fig. 15 Quantization parameters of the filter

    1. After quantizing the filter we need to set the coder option and generate VHDL code from the MATLAB. Select target> generate HDL from filter designer dialog box.

      Fig. 16 filter design box in MATLAB

    2. Change the default name n the target window to basicfir

      Fig.17 Target window in MATLAB

    3. Open the global setting tab of the filter and write Tutorial-Basic FIR filter in the comment in header text box

      Fig. 18 Global setting box for Filter

    4. Select the ports in the additional setting portion of the GUI.

      Fig. 19 Ports in the additional setting at the GUI

    5. Replace filter_in with data_in and filter_out with data_out in the input port text box

      Fig. 20 Changes in the input port text box

    6. Clear the add input register option from the input port text box then the box looks like as shown.

      Fig. 21 Input port text box final look after following instruction

    7. In the testbench tab, the file name box should have basicfir_tb as its entry onto it.

      Fig. 22 Testbench box in MATLAB

    8. Click on generate button to start generate process. The coder displays the message as in the command window shown in the following figure.

      Fig. 23 Message in Command window

    9. After the successful generation of VHDL codes analyse it on XILINX VIVADO. The waveforms are shown in the next segment of this paper.

  4. ANALYSIS OF VHDL CODE ON XILINX

    VIVADO

    The following VHDL code along with the testbench is generated using MATLAB FDATOOLS and the following code is analysed using Xilinx vivado the waveform obtained is then compared with the waveform posted on MATLAB tutorials. The waveform is shown below.

    Fig.24 (a) Waveform-I on Xilinx vivado

    Fig.24 (b) Waveform-II on Xilinx vivado

    RTL netlist of the following is generated as shown in the figure below, since the size of the filter is 51 tap so its impossible to capture in the screenshot but still some glimpse of that 51 tap filter is shown here:

    Fig. 25 RTL Netlist of the FIR Filter on Xilinx Vivado

    The project summary of the following filter is shown below:

    Fig. 26 post-implementation of fir filter

    Fig. 27 Post-synthesis and power on-chip of FIR filter

    Thus, the following FIR filter is successfully designed using MATLAB FDATOOLS and the XILINX VIVADO. The

    order of the filter is 50. This type of filter can be made using floating point, fixed point or even the distributed arithmetic coefficient and the MATLAB provides the platform for all the type of algorithm. FDATOOL provide the platform for the fixed point or the floating point coefficient, however for distributed arithmetic we have to follow some other procedure to configure it successfully.

    However, with the help of following paper its easy to recognize the use of MATLAB in transforming the MATLAB code to the VHDL code significantly, this paper will provide all the steps for designing the FIR filter. The filter order can vary for different design.

    In the recent development the Xilinx platform has provide all the significant and necessary information for the designing of the filter.

  5. FUTURE SCOPE AND APPLICATION

  1. With the help of the MATLAB its almost easy to design the FIR filter as it provide easy and suitable platform for the implementation of the FIR filter. MATLAB along with XILINX are helpful for the fast and error-free implementation of FIR filter.

  2. MATLAB provide easy approach to generate VHDL code for any configuration and any order.

  3. The following tutorial focuses on the practical aspects of FIR filter design. Practically, it is possible to design any FIR filter using MATLAB.

  4. The coefficient in the FIR filter can be fixed-point or floating-point or even distributed arithmetic algorithm etc. can be implemented using MATLAB.

  5. Its easy to configure and generate summary for the successful implementation of the FIR filter.

  6. Time- efficient implementation of the FIR Filter is possible using FDATOOLS.

REFERENCES

  1. Practical FIR Filter Design in MATLAB, Ricardo A. Losada, The MathWorks, Inc, 3 Apple Hill Dr. Natick, MA 01760, USA January 12, 2004.

  2. Introduction to Signal Processing, Prentice Hall, S. J. Orfanidis, Upper Saddle River, 1996.

  3. Theory and Application of Digital Signal Processing, L. R. Rabiner and B. Gold, Prentice Hall, Englewood Cliffs, 1975.

  4. Design of computationally efficient interpolated FIR filters,

    T. Saramaki, Y. Neuvo, and S. K. Mitra, IEEE Trans. on Circuits and Systems, vol. 35, N0. 1,pp. 70-88, January 1988

  5. Exchange algorithms that complement the Parks-McClellan algorithm for linear-phase FIR filter design, I. W. Selesnick and C. S. Burrus, IEEE Trans. on Circuits and Systems II, 44(2):137-142, February 1997.

  6. Sakshat virtual labs, Digital FIR filter design and simulation,

    NME-ICT initiative of MHRD.

  7. MATLAB FDATOOLS, MATHWORKS tutorials

  8. Circuit design and simulation with VHDL, The MIT Press,

    Volnei A. pedroni,2010

  9. XILINX VIVADO tutorial, Xilinx

  10. VHDL Primer by J.Bhaskar

  11. Design and verification of FIR filter based on MATLAB and DSP, Chen-Long Hu, IEEE 2012 International Conference on Image Analysis and Signal Processing (IASP), 10.1109/IASP.2012.6425042

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