 Open Access
 Total Downloads : 91
 Authors : Abdul Fahad , Diptarup Bhattacharya , Dr. Vinay Kumar
 Paper ID : IJERTV7IS020168
 Volume & Issue : Volume 07, Issue 02 (February 2018)
 DOI : http://dx.doi.org/10.17577/IJERTV7IS020168
 Published (First Online): 27022018
 ISSN (Online) : 22780181
 Publisher Name : IJERT
 License: This work is licensed under a Creative Commons Attribution 4.0 International License
Designing of High Frequency Analog Filter using 45nm CMOS based CCII
Mr. Abdul Fahad1, Mr. Diptarup Bhattacharya2, Dr. Vinay Kumar3
Dept. of Electronics & communication Engg NIT, Meghalaya
Abstract In VLSI, the design techniques are usually in voltage mode but several limitations are encountered like narrower bandwidth, lower linearity, high consumption of power, lesser gain and so on. We know the power consumption of any circuit is related to the product of the biasing voltage and current and, if we focus on current signal rather than the voltage signal, an effective and better control over the power is observed. So, current mode circuits like current conveyors are getting prominent consideration in the analog IC designs due to their broader bandwidth, higher flexibility, large dynamic range, low consumption of power and less area and hence more speed. In this paper a second generation current conveyor is designed and analyzed in the Cadence Spectra. Various analysis have been done for the design like transient and AC analysis. All the responses were realized in 45nm CMOS technology and simulated using Cadence (Virtuoso).
Keywords Transient; Bandwidth; Cadence; CCIIÂ±; Current mirror; Current mode

INTRODUCTION
Majority of the analog circuits are in voltage mode whose performance are evaluated in terms of voltage level [1]. But the major limitations of these circuits are like need for high supply voltage, decreased slew rate, and so on. They are also un suitable when used in high frequency applications, thus restraining the bandwidth of the circuit [2]. However, a MOSFET based current conveyor circuit seems to be a better approach for analog VLSI regime. MOS devices have the power to efficiently process current over voltage because in both the amplifier configurations i.e. the commonsource (CS) and the commongate (CG), current is the desired output. The commondrain (CD) configuration of the amplifier gives voltage which has the disadvantage of a bulkeffect present in the CMOS processes. The current conveyors (CCIs) based on MOS transistors serves a good building block as it is capable of showing better performance in comparison to the previous designed operational amplifiers and they also act more or less equal to an opamp and as a result it comes as an efficient and better replacement in the true real sense. The current conveyor (CCI) has some extra merits such as simple design, increased slew rate, higher bandwidth and small propagation delay. Such a current conveyor comprises one high input impedance and one low input impedance and also one high output impedance which make it favorable for both the voltage and current mode designs [3]. Many researchers have reported so many current conveyor circuits such as DDCC, CCCII, CDTA, so on, in the literature [4, 5]. Most of the circuits such as rectifiers, oscillators, filters, etc. have been analyzed using various types of current conveyors. The circuits which have been made using current conveyors gives impressive response showing broader
bandwidth, lower power consumption etc. So the researchers are being attracted towards the current conveyors for designing of various amplifier circuits. In this work, the introduction is discussed under section I. Section II gives a brief idea about all the types of current conveyors like first generation, second generation, and third generation i.e. how they work, node matrix relationship between the input and the output. Section III sheds light on how the CCII is designed followed by its design and the matrix relations. Section III also deals with the various analysis of CCII done in the Cadence Spectra i.e. AC response and transient response. The simulation results have been shown in the same section. Lastly, the paper is ended by a conclusion followed by references.

TYPES OF CURRENT CONVEYOR

First generation current conveyor CCI
The CCI is mainly a threeterminal device marked as X, Y, and Z. The X end potential equals whatever voltage is being applied to the Y end. The current that flows into Y end also flows into X, and the same current is mirrored at Z end with a high output impedance, thus acting as a variable constant current source.

Second generation current conveyor CCII
The CCII can be realised as an ideal transistor, with perfect ideal characteristics. The current that flows into the gate or base (Y) is zero. There is negligible baseemitter or gatesource potential drop, so the source/emitter voltage (at X) equals the voltage at Y. The gate/base (Y) has an infinite input impedance, while the emitter/source (X) has a zero input impedance. Any amount of current out of the emitter or source
(X) is mirrored at the collector or drain (Z) as current in, but with a very large impedance at the output.

Third generation current conveyor CCIII
The last but not the least configuration of the current conveyor is similar to the CCI, but here the current flowing into X terminal is reversed, so in a CCIII the current which flows into the Y terminal also flows out of X terminal.


SECOND GENERATION CURRENT CONVEYOR A second generation current conveyor is easier to design
since it does not need any highly accurate component and follows the principle of comparative biasing supply thus leading to the design and realises various applications like filter, rectifiers, etc. Fig. 1 depicts the block diagram of a typical CCII, where the terminal X is the low input impedance terminal, Y is the high input impedance terminal and Z+ and Z are the desired inphase and outphase terminals of the current conveyor respectively [1, 2].
Fig. 1. Block diagram of a typical CCII
In Fig. 1, the Y terminal experiences infinite (very large) input impedance. The voltage at the X terminal follows the voltage that is applied to the terminal Y, thus making the terminal X exhibit zero impedance at the input. The input current to X terminal is conveyed or carried to the high impedance output terminal Z where it is supplied with either of the polarities, positive (CCII+) or negative (CCII). The dependency between the currents and the voltages at the respective output input ports of CCII is shown in the following matrix:
terminal, the impedance is ideally null. The current IZ dont depend on the Vx. In this work, the CCIIÂ± circuit design shown in Fig. 2 is taken into use and is implemented in 45nm CMOS technology using Cadence Spectre (virtuoso).
B. Design analysis of CCII
The CCII Circuit shown in Fig. 2 is designed using Cadence by taking W/L ratio as 2/1. The circuit diagram is implemented in spectra as shown in Fig. 3, which serves as a strong active element. By running the transient and AC analysis, the performance of the circuit has been verified.
0 0 0 0 0
[0 0 ] = [1 0 0] (1)0 0

Design Approach of CCII
0 Â±1 0
Fig. 3. Circuit diagram of CCII implemented in gpdk 045nm
The simplicity in the design and structure of CCII helps it to possess a generalized nature, and therefore can be used as a prototype in the design of large amplifier systems. The transistor level circuit design of CCIIÂ± is given in Fig. 2.
Fig. 2. Transistor level circuit diagram of CCII
The above circuit of CCII shown in Fig.2 comprises one input cell which has a mixed translinear loop (M1 to M4), a pair of current mirrors (M5, M6 and M8, M9) which permit us to produce reliable current at the output as the mirror of the current in the input of the circuit and also do allow the translinear loop with the help of curren IB [6, 7] to be dc biased. The MOS transistors M6 , M11, M1, M2, M3, M4, M9 and M10 form a Trans linear pushpull type output structure, which is symmetrical as well as balanced. This symmetry helps in alleviating many problems like channellength modulation, temperature mismatch, and so on. For the production of the out of phase output, two MOS based current mirror circuits are cross coupled. In Fig.2, + sign means that the direction of current IZ is the same as shown, – stands for the opposite direction of IZ with respect to Ix. Terminal Y is the node where voltage is controlled with negligible current. When looking into the
Fig. 4. Symbolic test diagram of CCII in gpdk 045nm

Transient Analysis
Transient analysis has been simulated by taking a sinusoidal input of frequency 1 MHz (Fig.5) & 10 MHz (Fig.6) shows the transient response for the CCII block implemented in Cadence using 45nm technology. It can be inferred that the output at Z terminal is out of phase compared to the input at X terminal thus satisfying the Equation (1) cited above.
Fig. 5. Transient response of CCII circuit for 1 MHz
Fig. 6. Transient response of CCII circuit for 10MHz
In Fig.5, the wave on the upper side (R1) is the input supplied at the input terminal X and the wave (R0) is the desired out of phase output provided to the input, measured at Z terminal.

Ac Analysis

Fig.7 is showing the AC response of the CCII circuit block designed in Cadence. AC analysis provides excellent conformity between input and output up to 10 GHz according to the Equation (1).
Fig. 8. Frequency response of voltage gain at 0.45nm
Fig. 9. Current I/O characteristics at 0.45nm


ANALOG FILTER
Active filters are one of the most popular analogy filters as they have a significant advantage that they do not contain any inductors, and hence reducing the problems associated with it and also the general filters responses i.e. lowpass, bandpass and highpass can be obtained accurately[811]. A current mode active filter is implemented using a single CCII of Fig. 1, two resistors and two capacitors. The block diagram of the proposed filter is shown in Fig. 10. The filter designed using cadence is shown in Fig.11.
IR1 = s.C1.R1.R2.Ii
s2.C1.C2.R1.R2+s.C1 .(R1+R2)+1
(2)
IC2
= s2 .C1.C2.R1.R2.Ii
s2.C1.C2.R1.R2+s.C1.(R1+R2)+1
(3)
The quality factor Q and angular frequency w0 are given by the following expressions.
Fig. 7. A.c response of CCII circuit for 10 GHz
Q = 1
R1+R2
C2.R1.R2
(
C1
) (4)
In Fig.6 the wave for (I0) is the input provided and the wave for (R1) shows the AC (3db) response corresponding to the input provided. Hence the CCII block made is suitable for high frequency applications.
w0 = 1
(C1.C2.R1.R2)
(5)
Fig. 10. Block of proposed analog filter.

SIMULATION RESULTS
The optimized results of the circuit implemented as shown in Fig.8 are obtained for the following values of the passive components; R1=20K, R2=40, C1=2f and C2=20f. The biasing current is chosen to be 10A and the power supplies are selected to be Â±0.75V. The lowpass, bandpass and highpass response of the filter designed is shown in Fig. 12,13 respectively.
Fig. 11. Analogy filter design in gpdk045nm
Fig. 12. Response curve of Low pass filter
Fig. 13. Response curve of Band pass filter.
TABLE 1: Comparison Table
[9]  [10] 
Proposed 

Technology 
CMOS 
CMOS 
CMOS 
Technology node 
180nm 
500nm 
45nm 
No. of resistor 
1 
4 
1 
No. of active element 
2 
2 
1 
No. of capacitor 
1 
2 
1 
Type of active element 
CCIIÂ± 
CCIIÂ± 
CCII 
CONCLUSION
The CCII is analysed and simulated for pre layout and post layout designs. It has very good gain and higher bandwidth. Also it needs low voltage has low power consumption. Here current gain can be increased by improving the transimpedance at the X and Z terminals. Voltage gain may be improved by modifying the various topologies. After analyzing the results, it is assured that the circuits based on current mode give improved performance in low voltage low power applications when compared to circuits using voltage mode.The components values used in the simulation are R1=20 K, R2=40, C1=2f . The circuit has a single current conveyor as an active block. Transient analysis has been performed that proves the relation between the input current IX and output current IZ . AC analysis reveals a very good conformity between input and output up to 10 GHz. The bandwidth of the B.P.F.is 1.34 MHz to 10.19 GHz & for L.P.F. cutoff frequency is 5.54 GHz & 28.198 GHz
.Basically current conveyor can be use for various circuit such as, oscillator, function generator, rectifiers etc.
ACKNOWLEDGEMENT
I want to thank my Supervisor Dr. Vinay Kumar for is constant help and encouragement in doing this work .I also want to thank my parents and my friends for their constant support.
REFERENCES

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K. C. Smith, the current conveyor: a new circuit building block,
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Allen, P.E. y D.R. Holberg, CMOS analog circuit design. New York (Oxford University Press, 2002).

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