Comparison of Three Different Topologies of a Five Level Multilevel Inverter

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Comparison of Three Different Topologies of a Five Level Multilevel Inverter

Parimal H. Patil

Department of Electrical Engineering

Fr. C. Rodrigues Institute of Technology, Vashi, Navi Mumbai, India

Mini Rajeev

Department of Electrical Engineering

Fr. C. Rodrigues Institute of Technology, Vashi, Navi Mumbai, India

AbstractMultilevel inverters have been attracting the industrial sector in the recent times for the purpose of high power and medium voltage control. These multilevel inverters reduce the total harmonic distortion (THD) in the output waveform of the inverter without reducing the output voltage quality. This paper discusses the comparison of three different topologies of multilevel inverters that includes the diode clamped, flying capacitor and cascaded H-bridge multilevel inverter. These topologies are simulated in MATLAB- SIMULINK environment for grid connected application and results are presented.

Index TermsMultilevel Inverter (MLI), Total Harmonic Distortion (THD), diode clamped MLI, flying capacitor MLI, cascaded h-bridge MLI, Pulse Width Modulation (PWM), Level Shifted PWM

I.INTRODUCTION

The concept of multilevel inverters was introduced first in 1975. As the name indicates, a conventional two level inverter has only two levels in the output. But a multilevel inverter is capable of producing an output of more than two levels (including a zero voltage level). Nowadays multilevel inverters have gained a special attention in the areas of high- power and medium voltage applications. Many industries now are in a need of high or medium voltages for the drives. In high power grid connected inverters, we cannot afford a single switch with such a high voltage ratings, hence as an alternative to that we use MLI which makes use of many switches with reduced voltage ratings [7].The multilevel inverters have a lot of advantages as compared to a two-level inverter which are: lower harmonic content and hence lower THD, high power quality, lower switching losses, and finally better electromagnetic interference [10]. The MLI can also be used for interfacing the renewable energy sources to the grid.

MLI give an output voltage as a staircase waveform and as the number of levels of a MLI increases the waveform approaches closer to a sinusoidal waveform and the THD reduces with the increases in the number of levels of MLI.

From the past two decades a number of multilevel topologies have been proposed. Some of them are: diode clamped MLI (Neutral Point Clamped MLI), flying capacitor MLI, cascaded H-bridge, generalized MLI, reversing voltage MLI, modular MLI [6], multiple transformer MLI, multiwinding transformer MLI, modular topology of MLI etc. [4]. Along with these topologies there are also modulation

techniques which are being studied upon. The various modulation strategies are sinusoidal PWM, phase shifted PWM, level shifted PWM and Space Vector Modulation (SVM).

In the area of MLI many researchers have been working from the beginning and a lot of research is still going on. Work done in this sector has been studied and can be summarized in the subsequent lines. Paper mentioned in reference [5] has the MLI topologies used in standalone PV systems. The reference [10] includes the comparison of the three topologies of three phase five level MLI. The reference

  1. gives a brief idea regarding the various topologies and control strategies of MLI.

    Reference [14] includes the various newly developed topologies of cascaded H-bridge MLI with reduced number of switches and dc voltage sources. This topology helps in reducing the hardware required and finally the cost. Paper [15] includes advancement in the conventional cascaded MLI with the reduction in the number of voltage sources on the input side. In [16] a new topology of cascaded H-bridge was proposed which reduced the number of switches required as compared to the conventional topology. The percentage reduction of the switches is 41.667%.

    In this paper we are focusing on three topologies of MLI which are diode clamped, flying capacitor and cascaded H- bridge. The simulation for all the three topologies is performed in MATLAB and the results are presented in the paper. The modulation technique used for all the three topologies is level shifted PWM considering five levels of output voltage. The three topologies are compared based on Lowest Order Harmonic (LOH), Total Harmonic Distortion (THD), total number of switches required, number of controllable and uncontrollable devices required, etc.

    II. DIFFERENT TOPOLOGIES OF MLI

    In this section the basic structure and the working of the three topologies are mentioned. The three topologies under study are diode clamped MLI, flying capacitor MLI and cascaded H-bridge MLI. All the topologies in this paper are being studied for single phase grid connected systems for injecting 1000W active power.

    A] Diode Clamped MLI (NPC)

    The diode clamped MLI is also known as neutral point clamped MLI (NPC-MLI). The basic connection of NPC- MLI is as shown in figure-1 [6]. This figure shows only one leg of a single phase diode clamped MLI. For the three phase connection we need to connect such three legs. The number of voltage levels is defined only with respect to the positive half cycle of the voltage waveform i.e. while stating a five level MLI it means that we have 5 levels in the positive half cycle itself.

    In case of a 5-level diode clamped MLI we have voltage levels as: Vdc/4, Vdc/2, 3Vdc/4, Vdc and 0. With the appropriate switching of the switches we obtain the desired five level output voltage waveform. Normally, for a n-level diode clamped MLI we require 2(n-1) number of switching devices, (n-1) number of capacitors and (n-1)*(n-2) number of diodes [11]. In diode clamped inverters the number of diodes required is quite high, hence this topology is not preferred for higher number of voltage levels.

    Figure 1-Diode Clamped MLI (NPC-MLI)

    B] Flying Capacitor MLI

    This category of MLI is similar to that of the previous one discussed above. The only difference is that instead of diodes which are used for clamping the voltage we use capacitors to clamp the voltage across the switch. Figure-2 represents the connection diagram of the flying capacitor MLI [6].

    The number of switches required in case of this topology is same as that of the diode clamped MLI. The number of capacitors used in a flying capacitor topology increases quadratically following the relation as shown below for a generalized n-level MLI (excluding the capacitors on the main dc line)

    (n 1) *(n 2) 2

    Where n is the number of levels of an MLI

    Figure 2-Flying Capacitor MLI

    C] Cascaded H-Bridge MLI (CHB-MLI)

    As the name suggests this topology consists of H-bridges connected in a cascade connection with each other. As the number of voltage level of the MLI goes on increasing according to it the number of H-bridges also increases. For a general n-level cascaded H-bridge MLI we need (n-1) H- bridges. This category of MLI can be further classified as:

    1. Cascaded H-Bridge MLI with Equal Voltage Sources.

    2. Cascaded H-Bridge MLI with Unequal Voltage Sources.

      An H-bridge normally consists of four switches connected across a dc voltage source as shown in figure-3.

      Figure 3- H- Bridge Unit

      Now, in this paper we are studying the MLI with 5- levels. So, for a 5-level cascaded H-bridge we would need four such units which are connected in cascade.

      In the case of CHB-MLI with equal voltage source both the H-bridges have voltage sources which are equal inmagnitude. And the other way round in case of CHB-MLI with unequal voltage sources both the H-bridges have voltage sources with different magnitude. Figure-4 shows two H-bridges connected in cascade [6].

      Figure 4- Cascaded H-Bridge MLI

      1. CONTROL STRATEGY

        In the case of a conventional two level inverter we can generate PWM pulses for the switches, by comparing a reference wave with a carrier wave. In most of the cases the reference wave is the sinusoidal wave and the carrier wave is the triangular wave. The frequency of a sinusoidal wave is same as that of the output voltage. But at the same time the frequency of the carrier wave should be higher than the frequency of the reference wave.

        The modulation strategies used in the case of MLIs are classified on the basis of the switching frequency. The modulation strategy may be studied in two categories as:

        1. Based on Fundamental Frequency.

        2. Based on High Switching Frequency PWM.

        The fundamental switching PWM may be further classified as Space Vector Control PWM (SVC-PWM) and Selective Harmonic Elimination (SHE).The high switching frequency PWM can be further classified as Space Vector PWM and Sinusoidal PWM (SPWM). SPWM is the most popular technique used among all other PWM techniques. In SPWM the two most common ones used are Phase Shifted SPWM and Level Shifted SPWM.

        A] Phase Shifted Sinusoidal PWM

        In this technique we have triangular wave and the sinusoidal wave compared with each other. But the carrier waves i.e. the triangular waves used are each of equal magnitude and also phase shifted from each other by a particular phase angle .

        For a particular n-level MLI we need to have (n-1) number of triangular waves and all these waves should be phase shifted from each other by an angle given by (1)

        where, n is the number of levels of MLI.

        B] Level Shifted Sinusoidal PWM

        In this PWM method we have (n-1) carrier i.e. triangular waves compared with a sinusoidal wave for an n- level MLI. And in this method the triangular waves used are only level shifted from each other and all of them are in phase. Figure-5 shows a waveform representing a level shifted waveform.

        This technique of level shifted PWM can be further divided as [13]:

        1. In Phase Disposition (IPD).

        2. Phase Opposition Disposition (POD).

        3. Alternate Phase Opposition Disposition (APOD).

        In this paper, all the three topologies of MLI are simulated using level shifted PWM technique and among level shifted IPD scheme is utilised. We have chosen this PWM scheme because it is easy to implement and along with this the main reason is that the THD level of this scheme is less than that of phase shifted PWM [14].

        Figure 5- Level Shifted PWM

      2. SIMULATION RESULTS

        In this paper all the MLIs are studied for 5-level but here 5-level is considered only with respect to the positive half cycle of the voltage and current waveform. And when we take into consideration one complete cycle, then we have in all 9 voltage levels. Values considered for simulation are listed in table 1. These values are based on PV- grid connected application of inverters.

        TABLE 1- VALUES CHOSEN FOR THE SIMULATION

        Sr. No.

        Parameter

        1.

        Output voltage (rms)

        230V

        2.

        Output power

        1000W (1KW)

        3.

        Output frequency

        50Hz.

        4.

        Inverter switching frequency

        20.052KHz.

        5.

        Modulation Index

        0.93

        I] Diode Clamped MLI

        Figure -6 shows a MATLAB model of a diode clamped MLI and figure-7 shows the voltage waveform of the same.

        Figure -6 Simulink model of NPC-MLI

        Figure 7- Output voltage of 5-level NPC-MLI

        II] Flying Capacitor MLI

        The MATLAB model of this MLI is shown in Figure-8 and Figure -9 shows its output voltage waveform.

        Figure 8- Simulink model of Flying Capacitor MLI

        Figure 9- Output voltage of 5-level Flying Capacitor MLI

        III] Cascaded H-bridge MLI

        The simulation of cascaded H-bridge MLI with equal voltage sources was performed using the MATLAB software the circuit connection and the output of the same are shown in Figure-10 and Figure-11 respectively.

        Figure 10- Simulink model of Cascaded H-Bridge MLI

        Figure 11- Output voltage of 5-level Cascaded H-Bridge MLI

        Along with all this the THDs off all the topologies were also compared with each other. The THDs for all the topologies for 5-level can be summarized as shown in Table 1.

        MLI Topology

        THD

        Diode Clamped MLI

        17.48%

        Flying capacitor MLI

        17.82%

        Cascaded H-Bridge MLI

        15.90%

        MLI Topology

        THD

        Diode Clamped MLI

        17.48%

        Flying capacitor MLI

        17.82%

        Cascaded H-Bridge MLI

        15.90%

        TABLE 2- THD OBTAINED FOR ALL THE THREE TOPOLOGIES

        According to the IEEE standards the permissible THD limits for grid connection is 5% [2]. So, if we use these MLI topologies for grid interfacing then we need to connect a filter with appropriate design at the output of MLI to get a perfect sinusoidal wave. Table 3 includes the comparison of the topologies based on number of devices, total harmonic distortion of voltage and current, number of sinusoidal and triangular waves required, etc.

        Parameters

        Diode Clamped MLI

        Flying Capacitor MLI

        Cascaded H- Bridge MLI

        No. of Levels

        5

        5

        5

        Modulation Strategy

        Level Shifted PWM

        Level Shifted PWM

        Level shifted PWM

        No. of Triangular Waves Required

        8

        8

        8

        No. of Sinusoidal Waves Required

        2

        2

        1

        No. of Cascaded H- bridges Required

        None

        None

        4

        Extra logic gates required

        None

        None

        Required

        No. of Legs needed for single Phase Connection

        2

        2

        1

        LOH in Voltage

        3rd

        3rd

        5th

        Current THD

        17.48%

        17.82%

        15.90%

        LOH in Current

        3rd

        3rd

        5th

        No. of controllable Devices Required

        16

        16

        16

        No. of Uncontrollable Devices Required

        24 diodes+ 4 split capacitors

        12

        capacitors+4 split capacitors

        0

        No. of Voltage Sources Required

        1

        1

        4

        Parameters

        Diode Clamped MLI

        Flying Capacitor MLI

        Cascaded H- Bridge MLI

        No. of Levels

        5

        5

        5

        Modulation Strategy

        Level Shifted PWM

        Level Shifted PWM

        Level shifted PWM

        No. of Triangular Waves Required

        8

        8

        8

        No. of Sinusodal Waves Required

        2

        2

        1

        No. of Cascaded H- bridges Required

        None

        None

        4

        Extra logic gates required

        None

        None

        Required

        No. of Legs needed for single Phase Connection

        2

        2

        1

        LOH in Voltage

        3rd

        3rd

        5th

        Current THD

        17.48%

        17.82%

        15.90%

        LOH in Current

        3rd

        3rd

        5th

        No. of controllable Devices Required

        16

        16

        16

        No. of Uncontrollable Devices Required

        24 diodes+ 4 split capacitors

        12

        capacitors+4 split capacitors

        0

        No. of Voltage Sources Required

        1

        1

        4

        TABLE 3- COMPARISON BASED ON THE VARIOUS FACTORS

      3. CONCLUSION

In this paper, various topologies and control strategies of multilevel inverters which can be used for PV-grid connected applications were studied. Simulation was done to verify the theoretical aspects. This paper might help the researchers to choose a particular topology of MLI for a specific application. Based on the comparison we can choose cascaded H-bridge topology of MLI for PV-grid connected applications for feeding 1KW power to the grid. But while achieving grid connection we need to make the output voltage a perfect sinusoidal wave which is possible by the use of filter. This might be considered as the future expansion of this paper.

The main reason for selecting this topology is that it requires less number of uncontrollable devices as compared to the other topologies and also we require a single sinusoidal wave for generating the PWM signals for the switching devices. Also the future expansion of the number of levels of this MLI can be easily done simply by addition of appropriate number of H-bridges to the present circuit. One more reason for selecting this topology is that from the comparison we can

note out that the THD of this topology is less as compared to the other two topologies of MLI.

REFERENCES

  1. GiampaoloButicchi, DavideBarater, Emilio Lorenzani, Carlo Concari, and Giovanni Franceschini, A Nine-Level Grid- Connected Converter Topology for Single-Phase Transformerless PV Systems, IEEE Trans. Ind. Electron., vol. 61,no. 8, Aug 2014, pp. 3951-3960.

  2. Abraham Ellis, Interconnection Standards for PV Systems, Sandia National Laboratories, Oct. 2009.

  3. Mary George, Anil Kumar V M, Multilevel Inverters for Grid Connected Photovoltaic System, IOSR Journal of Electrical and Electronics Engineering, vol. 8, issue 2, Dec.2013, pp. 26-32.

  4. N. Mohan, T. Undeland, and W. Robbins, Power Electronics: Converters, Applications, and Design, Wiley, 2003, ISBN: 978-0- 471-22693-2.

  5. SérgioDaher, Jürgen Schmid, and Fernando L. M. Antunes, Multilevel Inverter Topologies for Stand-Alone PV Systems, IEEE Trans. Ind. Electron., vol. 55, no. 7, July 2008, pp. 2703- 2712.

  6. Andreas Nordvall, Multilevel Inverter Topology Survey, Thesis for the Degree of Master of Science, 2011, pp.1-78.

  7. Surin Khomfoi and Leon M. Tolbert, Multilevel Power Converters, The University of Tennessee, pp-31.1-31.50.

  8. Jaysing Ashok Kshirsagar and K. Vadirajacharya, Performance evaluation of five level inverter for solar grid connected system, International Journal of Current Engineering and Technology, ISSN 2277 4106, issue-3, April 2014, pp. 222-225.

  9. Penugonda V. V. N. M. Kumar, P. M. Kishore, R. K. Nema, Simulation Of Cascaded H-Bridge Multilevel Inverters For PV Applications, ICGSEE-2013 International Conference on Global Scenario in Environment and Energy, International Journal of Chem Tech Research IJCRGG, ISSN : 0974-4290 vol.5, no.2, June 2013, pp. 918-924.

  10. H.S.Sangolkar, P.A.Salodkar, Comparative Analysis of Three Topologies of Three-Phase Five Level Inverter, International Journal of Scientific Engineering and Technology, ISSN: 2277- 1581, vol. 3, issue 6, June 2014, pp. 818-822.

  11. Bindeshwar Singh, Nupur Mittal, Dr. K.S. Verma, Dr. Deependra Singh, S.P. Singh, Rahul Dixit, Manvendra Singh and Aanchal Baranwal, Multi-Level Inverter: A Literature Survey On Topologies And Control Strategies, International Journal of Reviews in Computing, ISSN: 2076-3328 E-ISSN: 2076-3336, July 2012, vol. 10, pp. 1-16.

  12. Muhammad H. Rashid, Power Electronics Circuits, Devices, and Applications, third edition, 2003.

  13. A.Venkatakrishna, R.Somanatham and M.Sandeep Reddy, Phase Shifted and Level Shifted PWM Based Cascaded Multilevel Inverter Fed Induction Motor Drive, International Journal of Current Engineering and Technology, INPRESSCO, vol.4, no.1, Feb. 2014, pp. 350-354.

  14. M. Kavitha, A. Arunkumar , N. Gokulnath, S. Arun, New Cascaded H-Bridge Multilevel Inverter Topology with Reduced Number of Switches and Sources, IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE), ISSN: 2278-1676, vol. 2, issue 6, Oct. 2012, pp. 26-36.

  15. Ebrahim Babaei, Member, IEEE, Sara Laali, Student Member, IEEE, and Zahra Bayat, A Single-Phase Cascaded Multilevel Inverter Based on a New Basic Unit with Reduced Number of Power Switches, IEEE Trans. Ind. Electron., DOI 10.1109/ TIE.2014.233660.

  16. Gobinath, Mahendran, Gnanambal, NEW CASCADED H- BRIDGE MULTILEVEL INVERTER WITH IMPROVED EFFICIENCY, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, ISSN: 2278 8875, vol. 2, Issue 4, April 2013, pp. 1263-1271.

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