Comparison of the Performance of Distributed Power Flow Controller and Distributed Interline Power Flow Controller Facts Controllers in Power System

Comparison of the Performance of Distributed Power Flow Controller and Distributed Interline Power Flow Controller Facts Controllers in Power System

Kotipalli Vineela Chandrika

PG Scholar, Department of EEE

1. R .Siddartha Engineering College Vijayawada-12, Andhra Pradesh,

   India

   Palakaluri Venkatesh

   Assistant Professor, Department of EEE

   1. R. Siddartha Engineering College, Vijayawada-12, Andhra Pradesh,

      India

      Abstract This paper describes the power flow control in transmission line with Flexible AC Transmission System (FACTS) family, called Distributed Power Flow Controller (DPFC) and Distributed Interline Power Flow Controller (DIPFC). The DPFC is derived from the Unified Power Flow Controller (UPFC). The DPFC can be considered as UPFC with an eliminated common DC link, to enable the independent operation of the shunt and the series converters which enhances the effective placement of the series and shunt converters. The active power exchange between the two converters, which is through the common dc link in the UPFC, is now through the transmission lines at the third-harmonic frequency in the DPFC & DIPFC. DPFC & DIPFC is used to mitigate the voltage sag and swell as a power quality issue. The DPFC and DIPFC has the same control capability as the UPFC, which comprises the adjustment of the line impedance, the transmission angle, and the bus voltage. In DPFC three-phase series converter is divided to several single-phase series distributed converters through the transmission line and in DIPFC three single phase series converters are placed in between the two transmission lines. Modelling and principle of operation is presented in this paper. To verify the DPFC principle two case studies are considered. Case (i) DPFC is placed in a single-machine infinite bus power system including two parallel transmission lines. Case (ii) Distributed Interline Power Flow Controller (DIPFC) is placed between the two parallel transmission lines of infinite bus. The case studies are simulated in MATLAB/ Simulink and the results validate the DIPFC has ability to improve the power quality then DPFC.

      Keywords Power Quality, FACTS, Distributed Power Flow Controller (DPFC), DIPFC, UPFC.

      1. INTRODUCTION

Now a days power system facing a power quality problem due to increase in power demand and increase in industrial plants. Good power quality means the power supply which can always available within voltage and frequency tolerance and also these are harmonic free and pure sinusoidal shape.

A Power Quality problem can be defined as deviation of magnitude and frequency from the ideal sinusoidal wave from. Good power quality is benefit to the operation of electrical equipment, but poor power quality will produce great harm to the power system [1]. Harmonics are defined as sinusoidal wave form having a frequency equal to an integer multiple of the power system fundamental frequency. It is a component of a periodic waveform. If the fundamental frequency multiple is not an integer, then we are dealing with inter harmonics [1].

Most of the electronic equipments such as personal computers, telecommunication equipment, microprocessors, and microcontrollers etc; are generally responsible to Power Quality problems. A poor power quality has become a more important issue for both power suppliers and customers. Poor power quality means there is a deviation in the power supply to cause equipment malfunction or may failure.

To solve the power quality problem the power electronic devices such as flexible alternating-current transmission system (FACTS) and custom power devices (DVR) which are used in transmission and distribution control, respectively, should be developed [2], [3], [4].

The impact of transient parameters in majority of transmission lines problems such as sag (voltage dip), swell (over voltage) and interruption, are also considerable [5]. To mitigate the mentioned power quality problems, the utilization of FACTS devices such as power flow controller (UPFC) and synchronous static compensator (STAT-COM) can be helpful [6] , [7]. In [8], the distributed power flow controller (DPFC) is presented which has a similar configuration to UPFC structure. By applying the two approaches eliminating the common DC link and distributing the series converter, the UPFC is further developed into a new combined FACTS device: the Distributed Power Flow Controller (DPFC), as shown in Figure 1.

Figure 1: Flowchart from UPFC to DPFC

The DPFC is composed of a single shunt converter and multiple independent series converters as shown in Figure 2, which is used to balance the line parameters, such as line impedance, transmission angle and bus voltage magnitude [8], [9]. To detect the voltage sags and determine the three single- phase reference voltages of DPFC, the SRF method is also proposed as a detection and determination method.

Accordingly, the cost of the DPFC system is lower than the UPFC. The controllability of the DPFC is same as that of the UPFC which refers to the adjustment of the line impedance, the transmission angle, and the bus voltage. The operation principle, the modelling and control, and experimental demonstrations of the DPFC are presented in this paper.

1. OPERATING PRINCIPLE AND CONTROL OF DPFC

   1. Active Power Exchange with Eliminated DC Link

      Within the DPFC, the transmission line presents a common connection between the AC ports of the shunt and the series converters. Therefore, it is possible to exchange active power through the AC ports. The method is based on power theory of non-sinusoidal components. According to the Fourier analysis, non-sinusoidal voltage and current can be expressed as the sum of sinusoidal functions in different frequencies with different amplitudes. The active power resulting from this non-sinusoidal voltage and current is defined as the mean value of the product of voltage and current. Since the integrals of all the cross product of terms with different frequencies are zero, the active power can be expressed by:

      P V i I i cosi i1

      (1)

      Figure 2: DPFC configuration

      II. STRUCTURE OF DPFC

      To reduce the failure rate of the components by selecting components with higher ratings than necessary or employing redundancy at the component or system levels are also options. Unfortunately, these solutions increase the initial investment necessary, negating any cost-related advantages. Accordingly, new approaches are needed in order to increase reliability and reduce cost of the UPFC and DPFC at the same time. The elimination of the common DC link also allows the DSSC concept to be applied to series converters. In that case, the reliability of the new device is further improved due to the redundancy provided by the distributed series converters.

      Unlike in UPFC where the active power transfer is through the DC link between the series and shunt converters

      [10] here in DPFC this power flow is through the transmission lines at the third harmonic frequency which is a zero-sequence component and can be naturally blocked by a Y- transformer. The DPFC makes use of the distributed FACTS (D-FACTS) in the design of the series converter, which is to use multiple single-phase converters instead of one large rated three phase converter while the shunt converter remains as static synchronous compensator (STATCOM) as in UPFC. These large numbers of series converters provides redundancy, thereby increasing the system reliability. As the D-FACTS converters are single- phase and floaing with respect to the ground, there is no high-voltage isolation required between the phases.

      Where Vi and Ii are the voltage and current at the ith harmonic frequency respectively, and i is the corresponding angle between the voltage and current. Equation (1) shows that the active powers at different frequencies are independent from each other and the voltage or current at one frequency has no influence on the active power at other frequencies. The independence of the active power at different frequencies gives the possibility that a converter without a power source can generate active power at one frequency and absorb this power from other frequencies.

      By applying this method to the DPFC, the shunt converter can absorb active power from the grid at the fundamental frequency and inject the power back at a harmonic frequency. This harmonic active power flows through a transmission line equipped with series converters. According to the amount of required active power at the fundamental frequency, the DPFC series converters generate a voltage at the harmonic frequency, there by absorbing the active power from harmonic components. Neglecting losses, the active power generated at the fundamental frequency is equal to the power absorbed at the harmonic frequency. For a better understanding, Figure 3 indicates how the active power is exchanged between the shunt and the series converters in the DPFC system. The high-pass filter within the DPFC blocks the fundamental frequency components and allows the harmonic components to pass, thereby providing a return path for the harmonic components. The shunt and series converters, the high pass filter and the ground form a closed loop for the harmonic current.

      Figure 3: Active power exchange between DPFC converters

   2. Third Harmonic Components

      Due to the unique features of 3rd harmonic frequency components in a three-phase system, the 3rd harmonic is

      flow control, low frequency power oscillation damping and balancing of asymmetrical components. According to the system requirements, the central control gives corresponding voltage reference signals for the series converters and reactive current signal for the shunt converter. All the reference signals generated by the central control concern the fundamental frequency components.

      Series Control: Each single-phase converter has its own series control through the line. This controller inputs are series capacitor voltages, line current and series voltage reference in dq-frame.

      The expressions for voltages in dq-frame is

      selected for active power exchange in the DPFC. In a three- phase system, the 3rd harmonic in each phase is identical, which means they are zero-sequence components. Because the zero-sequence harmonic can be naturally blocked by

      V d cos t

      V q sin t

      (2)

      (3)

      Y- transformers and these are widely incorporated in power systems (as a means of changing voltage), there is no extra

      Now the reference voltage in fundamental component is

      filter required to prevent harmonic leakage. the – winding appears open-circuit to the 3rd harmonic current, all harmonic

      V ref 1 = V d cost +V d cos t

      (4)

      current will flow through the Y- winding and concentrate to the grounding cable as shown in Figure 4. Therefore, the large high-pass filter is eliminated.

      The error signal in dc link capacitor voltage is given by the

      difference between the reference voltage in dc link capacitor and the actual voltage and the expression is given as,

      V dc,se = V ref ,dc – V dc (5) The reference voltage in third harmonic component is given by,

      V ref 3 = V dc,se sin 3t

      Now the total voltage in series converter is,

      (6)

      Figure 4: Utilize Grounded Y transformer to provide the path for the zero- sequence third harmonic

   3. DPFC Control

   To control multiple converters, a DPFC consists of three types of controllers: central control, shunt control and series control, as shown in Figure 5.

   The shunt and series control are localized controllers and are responsible for maintaining their own converters parameters. The central control takes care of the DPFC functions at the power system level. The function of each controller is listed below.

   Figure 5: DPFC control block diagram

   Central Control: The central control generates the reference signals for both the shunt and series converters of the DPFC. Its control function depends on the specifics of the DPFC application at the power system level, such as power

   V ref = V ref 1 +V ref 3 (7)

   By using sinusoidal pulse width modulation we are generating the gate pulses for series converters.Any series controller has one low-pass and one 3rd-pass filter to create fundamental and third harmonic current respectively. Two single-phase phase lock loop (PLL) are used to take frequency and phase information from network [11]. The simulated diagram of series controller is shown in Figure 6.

   Figure 6 – The series control structure.

   Shunt Control: The shunt converter includes a three-phase converter which is back-to-back connected to a single-phase converter. The three-phase converter absorbs active power

   from grid at fundamental frequency and controls the dc voltage of capacitor between this converter and single-phase one. The shunt control structure block diagram is shown in Figure 7.

   The voltages in dq-reference frame is Vdref and Vqref Now, the dqo is transformed into abc by using parks transformation.

   aim to control the parameter of a single transmission line, the IPFC is conceived for the compensation and control of power flow in a multi-line transmission system

   Each converter can provide series reactive compensation of its own line, just as an SSSC can. As the converters can exchange active power through their common DC link, the DIPFC can also provide active compensation..

   V a = V d ,ref sin t +V q,ref cos t

   +V 0 (8)

   V b = V d ,ref sin(t 120) +V q,ref cos(t 120) +V 0

   (9)

   V c = V d ,ref sin(t 120) +V q,ref cos(t 120) +V 0

   (10)

   By using PWM technique gate pulses are generated for shunt control circuit

   Third Harmonic Control: In third harmonic control circuit we have to change the fundamental frequency in to third harmonic frequency so, here we are multiplying with 3 to the frequency.

   The voltages in dq0-reference frame is

   Figure 8: IPFC configuration

   Similar to the DPFC, the DIPFC consists of multiple single-phase series converters, which are independent from each other. As the DIPFC is a power flow control solution for multiple transmission lines, the series converters are installed in different lines. The DIPFC can also include shunt

   converters, but these are not compulsory. The single line

   V d = V cos 3t +V sin t

   (11)

   diagram of a DIPFC is shown in Figure 9.

   V q = V

   cos 3t -V

   sin t

   (12)

   There is an exchange of active power between the DIPFC

   converters and this active power is exchanged in the same transmission line at the 3rd harmonic frequency. If the DIPFC

   V 0 = 0 (13)

   Now, the dqo is transformed into abc by using parks transformation by using the equations (8), (9) and (10). By using PWM technique gate pulses are generated for third harmonic control circuit.

   Figure 7 – The shunt control configuration: (a) for fundamental frequency (b) for third-harmonic frequency.

2. PROPOSED DISTRIBUTED INTERLINE POWER FLOW CONTROLLER (DIPFC)

   The Distributed Interline Power Flow Controller (DIPFC) consists of the two (or more) series converters in different transmission lines that are inter-connected via a common DC link, as shown in Figure 8. Unlike other FACTS devices that

   is without a shunt converter, the series converters in one transmission line will exchange active power with the converters in the other lines. If there is a shunt converter in the DIPFC, the shunt converte will supply the active power for each series converter.

   Figure 9: DIPFC configuration

3. SIMULATION RESULTS

   The case study (i), considering sag/swell condition is implemented in single machine infinite bus system and analyzed results are as follows. To analyze voltage dip, a three-phase fault near the system load, as shown in Figure 10 is created. The time duration for this fault is 0.5 seconds (500- 1000 ms). The three-phase fault causes observable voltage sag during this time, as shown in Figure 11. The voltage sag value is about 0.5 per unit. The DPFC can compensate the load voltage sag effectively. The voltage sag mitigation with DPFC is shown in Figure 12.

   Dis cre te , 3.255e -00

   = A Va b c

   I a b c

   1. a

      b

   2. c

      A

      N B

      C

      A A

      B B

      C C

      1. a Conn1

      2. b Conn3

      c

      Conn2 A a

      Conn4

      B b

      A B C

      A B

      C

      A Va b c I a b c

      C n2

      Conn5

      Conn6 B a

      C c b

      C c

      a

      b c

      A

      B C

      A B C

      100 MW

      +

      i

      –

      g + + g

      A

      A

      B

      C – – B

      Ishunt

      v

      +

      pulses –

      shunt converter

      pulses

      3rd hormoni c

      Figure 10. Simulated model of the Test System with DPFC

      Voltage MAgnitude in P.U

      Current Magnitude in P.U

      2

      9

      1 6

      3

      0 0

      -3

      -6

      -1 -9

      -2

      0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16

      Time in Seconds

      Figure 11 Three-phase load voltage sag waveform (without DPFC)

      0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16

      Time in Seconds

      Figure 13 Three-phase load current swell waveform (without DPFC)

      1.5

      Voltage Magnitude in P.U

      1

      0.5

      1.5

      Current Magnitude in P.U

      1

      0.5

      0

      0

      -0.5

      -1

      -1.5

      0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16

      Time in Seconds

      Figure 12 Mitigation of load voltage sag with DPFC

      After creating three-phase fault, Fig. 13 depicts the load current swell around. The fault time duration is 0.5 seconds. In this case, after implementation of the DPFC, the load current magnitude is comparatively come down. The current swell mitigation for this case can be observed from Fig. 14. The load voltage harmonic analysis, using fast fourier transform (FFT) of power GUI window by simulink, as shown in Fig. 16. It can be seen, after DPFC implementation in system, the odd harmonics are reduced within acceptable limits and total harmonic distortion (THD) of load voltage is minimized.

      -0.5

      -1

      -1.5

      0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16

      Time in Seconds

      Figure 14 Mitigation of load current swell with DPFC.

      Selected signal: 8 cycles. FFT window (in red): 6 cycles

      1

      0

      -1

      0 0.05 0.1 0.15

      Time (s)

      Fundamental (50Hz) = 0.752 , THD= 16.08%

      Mag (% of Fundamental)

      40

      30

      20

      10

      0

      0 2 4 6 8 10

      Harmonic order

      Figure 15. THD without DPFC (16.08%)

      Selected signal: 8 cycles. FFT window (in red): 4 cycles

      0.5

      0

      -0.5

      0 0.05 0.1 0.15

      Time (s)

      Fundamental (50Hz) = 0.9516 , THD= 0.71%

      0.6

      Mag (% of Fundamental)

      0.5

      0.4

      0.3

      0.2

      0.1

      0

      0 2 4 6 8 10

      Harmonic order

      Figure 16 THD with DPFC (0.71%)

      PQ

      Vabc

      In Mean

      Discre te , 3.255e -00

      = A Va bc

      Iabc

      Aa Ia bc

      A

      N B

      C

      A A

      Aa A a

      Bb Conn11

      Cc Conn21

      Conn1 Conn3 Conn5 Conn7

      1. a

         Conn12 b

      2. c

      Conn22

      Conn2 Conn4 Conn6 Conn8

      A a

      3-phase Instantaneous

      Active & Reactive Power

      A

      B C

      A B C

      Mean Value (linear)

      In Mean

      Mean Value (linear)1

      active&reactivepower

      B B

      C C

      b

      Bb B

      DIPFC

      B b

      A Va bc

      Ia bc

      c B a

      C

      Cc C n2 C c b c

      a b c

      A B C

      A B C

      100 MW

      +

      i

      –

      g + + g

      A

      A

      B

      C – – B

      Ishunt

      v

      +

      pulses –

      shunt converter

      pulses

      3rd hormonic

      Figure 17. Simulated model of the Test System with DIPFC

      In case (ii) Distributed Interline Power Flow Controller

      (DIPFC) is connected in between two parallel bus system. Case study of the system is same as DPFC system shown in figure 17. It is seen that after implementation of DIPFC the THD is reduced from 1.61% to 0.26% which is shown in figure 18.

      0.5

      0

      -0.5

      Selected signal: 8 cycles. FFT window (in red): 4 cycles

      0 0.05 0.1 0.15

      Time (s)

      Fundamental (50Hz) = 0.9756 , THD= 0.45%

      Mag (% of Fundamental)

      0.4

      0.3

      0.2

      0.1

      0

      0 2 4 6 8 10

      Harmonic order

      Figure 18 The load voltage THD with DPFC (0.45%)

      Without DPFC	With DPFC	With DIPFC
      16.08%	0.71%	0.45%

      TABLE I : THD COMPARISON BETWEEN WITHOUT DPFC, WITH DPFC & DIPFC

4. CONCLUSION

The power quality enhancement of the power transmission systems is an vital issue in power industry. In this study, the application of DPFC and DIPFC as a new FACTS device, in the voltage sag and swell mitigation of a system composed of a three-phase source connected to a non-linear load through the parallel transmission lines is simulated in Matlab/Simulink environment. The voltage dip is analyzed by implementing a three-phase fault close to the system load. To detect the voltage sags and determine the three single phase reference voltages of DIPFC, the SRF method is used as a detection and determination method. The obtained simulation results show the effectiveness of DIPFC in power quality enhancement, especially in sag and swell mitigation when compared with DPFC.

SIMULATED SYSTEM PARAMETERS

REFERENCES

1. Lu Yan: Wind Power Generation related power quality Issues 2010.

2. J. R. Enslin, Unified approach to power quality mitigation, in Proc. IEEE Int. Symp. Industrial Electronics (ISIE 98), vol. 1, 1998.

3. B. Singh, K. Al-Haddad, and A. Chandra, A review of active filters for power quality improvement, IEEE Trans. Ind. Electron. vol. 46, no. 5, pp. 960971, 1999.

4. M. A. Hannan and A. Mohamed, member IEEE, PSCAD/EMTDC simulation of unified series-shunt compensator for power quality improvement, IEEE Transactions on Power Delivery, vol. 20, no. 2, 2005.

5. J. Faiz, G. H. Shahgholian, and M. Torabian, Design and simulation of UPFC for enhancement of power quality in transmission lines, IEEE International Conference on Power System Technology, vol. 24, no. 4, 2010.

6. A. L. Olimpo and E. Acha, Modeling and analysis of custom power systems by PSCAD/EMTDC, IEEE Trans. Power Delivery, vol. 17, no.1, pp. 266272, 2002.

7. P. Pohjanheimo and E. Lakervi, Steady state modeling of custom power components in power distribution networks, in Proc. IEEE Power Engineering Society Winter Meeting, vol. 4, Jan, pp. 29492954, 2000.

   Parameters	Values
   Rated Voltage	230kV
   Frequency	50 Hz
   Rated Power	50 MW
   X/R Ratio	7
   Short Circuit Capacity	8500MW
   Transmission line length	180 km
   Resistance/km in p.u	0.012
   p>Inductance/km in p.u	0.9337 mH
   Capacitance/km in p.u	12.74 µF

8. Z. H. Yuan, S. W. H de Haan, B. Frreira, and D. Cevoric, A FACTS device: Distributed power flow controller (DPFC), IEEE Transaction on Power Electronics, vol.25, no.10, October, 2010.

9. Z. H. Yuan, S. W. H de Haan, and B. Frreira DPFC control during shunt converter failure, IEEE Transaction on Power Electronics 2009.

10. R. Zhang, M. Cardinal, P. Szczesny, and M. Dame. A grid simulator with control of single-phase power converters in D.Q rotating frame, Power Electronics Specialists Conference, IEEE 2002.