A Soft-Switched High-Conversion-Ratio Quasi-Resonant Flying Capacitor DC-DC Converter

A Soft-Switched High-Conversion-Ratio Quasi-Resonant Flying Capacitor DC-DC Converter

Umavathi V,

Department of Electrical and Electronics Engineering, Er. Perumal Manimekalai College of Engineering, Hosur- 636308, Tamil Nadu

Dr. V. Vijayal

ME., Ph. D, Department of Electrical and Electronics Engineering, Er.Perumal Manimekalai College of Engineering, Hosur-636308, Tamil Nadu

Abstract: This paper presents a comprehensive simulation-based validation of a recently proposed soft-switched quasi-resonant flying capacitor DCDC converter, targeting high step-down (e.g., 48 V to 15 V) low-power applications. Unlike conventional multi-level buck converters, this topology leverages complete charge and discharge of a nano-farad-scale flying capacitor in every switching cycle to enable inherent zero-voltage switching (ZVS) and zero-current switching (ZCS) in discontinuous conduction mode (DCM). A detailed model was developed in MATLAB/Simulink 2024b to replicate both DCM and continuous conduction mode (CCM) operation under frequency- modulated control. Simulation results confirm full soft-switching in DCM across all MOSFETs, partial soft-switching in CCM, and a square root dependence of output voltage on switching

frequency ( ), consistent with theoretical predictions. The study validates the converters suitability for 48 V point-of- load (POL) systems where switching losses dominate and establishes a foundation for implementation.

Keywords: Flying capacitor converter, soft switching, quasi- resonant, high step-down, 48 V POL, frequency modulation, MATLAB/Simulink.

I. INTRODUCTION

The shift toward 48 V power distribution in automotive, data centres, and USB-PD systems has intensified the need for efficient, single-stage point-of-load (POL) converters that can step down to 15 V at power levels from

<1 W to ~50 W 1. Traditional buck converters suffer from extremely low duty cycles and high switching losses under such high conversion ratios. While multi-phase, coupled- inductor, and resonant topologies offer partial solutions, many lack soft-switching across the full load range or require complex control.

A promising alternative was recently introduced by Eleftheriades and Prodic. 3: a quasi-resonant flying capacitor buck converter that achieves full soft-switching in DCM and partial soft-switching in CCM by fully charging and discharging a small flying capacitor () between 0 and in each half-cycle. This enables frequency-based regulation and a well-damped small-signal response.

This paper does not propose a new topology but presents an independent simulation study using MATLAB/Simulink 2024b to validate the operational claims of 3. No hardware was usedthis is a Phase 1 simulation- only effortto verify soft-switching behaviour, control law, and mode transitions before proceeding to prototype development.

II LITERATURE SURVEY

Title: A 48-V-to-1-V Tapped-Inductor Buck Converter with Active Clamp for 90% Efficiency Author: Chen X., Liu M., Wang H. Publication: IEEE Applied Power Electronics Conference (APEC), pp. 11201126, Mar. 2024 Abstract: The authors demonstrate a hard-switched tapped- inductor buck converter achieving 90% peak efficiency at 20

W. While effective, the design requires a custom coupled inductor with tight leakage control and active-clamp circuitry, increasing cost and EMI filtering complexity. Such magnetic customization makes it unsuitable for low-budget academic prototyping.

Title: Multi-Level Flying Capacitor DCDC Converter with Passive Balancing Author: Rentmeister J. S., Stauth J. T. Publication: IEEE Applied Power Electronics Conference (APEC), pp. 367372,2017

Abstract: This work presents a 48 V-to-2 V 7-level flying capacitor converter with passive voltage balancing. Despite moderate efficiency (75% at 10 A), the topology suffers from hard switching at all load levels. Efficiency drops below 55% at light loads (<100 mA), highlighting a critical gap in soft- switching capability that limits low-power usability precisely where quasi-resonant approaches excel.

Title: Low-Power Multi-Level Flying Capacitor ConvertersModeling and Control Author: Vukadinovi N.

Publication: Ph.D. Dissertation, University of Toronto, 2018

Abstract: This dissertation comprehensively analyses FCML converters for low-power applications but concludes that hard-

switching dominates switching losses below 1 W. The author proposes digital light-load control schemes, yet acknowledges that soft-switching remains unachieved across the full load rangemotivating the need for topologies like the quasi- resonant flying capacitor converter.

Title: A Hybrid Resonant Switched-Capacitor Converter for 48 V5 V Point-of-Load Author: Ye Z., Lei Y., Pilawa- Podgurski R. C. N. Publication: IEEE Transactions on Power Electronics, vol. 35, no. 5, pp. 49464958, May 2020 Abstract: The authors propose a resonant switched-capacitor (ReSC) converter achieving 92% efficiency at 50 W. However, the topology is fixed-ratio (e.g., 4:1 or 5:1), requiring post-regulation for variable outputadding complexity. In contrast, the quasi-resonant flying capacitor

converter supports continuously variable output via simple frequency control, making it more flexible for general-purpose POL applications.

Title: Analysis and Design of a Non-Isolated High Step- Down Converter with Coupled Inductor and ZVS Author: Wei C., Zhao Y., Zheng Y., et al. Publication: IEEE Transactions on Industrial Electronics, vol. 69, no. 9, pp. 90079018, Sep.2022

Abstract: This converter achieves ZVS using a coupled inductor but requires a precise turns ratio and suffers from leakage inductance losses. The magnetic component is bulky and difficult to integratehighlighting the advantage of inductor-only, magnet-free soft-switching in flying capacitor quasi-resonant designs.

III. PROPOSED SYSTEM

1. System Architecture

   Fig. 1 Proposed System Block Diagram (Simulink Model)

   driven between 0 V and every half-cycle, enabling resonant energy transfer and inherent soft-switching.

   The proposed converter (Fig. 1) features a five-

   switch non-isolated topology: four main switches (SW1 SW4) arranged in two half-bridges, a synchronous rectifier (SW5), a small flying capacitor (), a single inductor (), and an output filter capacitor (). Unlike conventional multi-level flying capacitor converters, is intentionally

   No transformers, coupled inductors, or auxiliary resonant networks are usedensuring compatibility with standard PCB fabrication and low-cost academic prototyping.

2. Operating Principle

   The converter operates in two primary modes:

   1. Discontinuous Conduction Mode (DCM) at light loads (<1 W):

      • fully charges from 0 and discharges back to 0 via resonant interaction with .

      • All switching transitions exhibit zero-voltage switching (ZVS) or zero-current switching (ZCS).

      • No switching losses occur, enabling >90% estimated efficiency even at 100 mW.

   2. Continuous Conduction Mode (CCM) at higher loads (>5 W):

      • Inductor current remains continuous.

        energy exchange, combined with a fixed 50% duty cycle on switches SW1SW4 and adaptive gating of synchronous rectifier SW5, enables inherent soft-switching across a wide load range. The converter functions in two pimary modes: Discontinuous Conduction Mode (DCM) at light loads and Continuous Conduction Mode (CCM) at higher loads.

        1. Discontinuous Conduction Mode (DCM)

           In DCM (e.g., output current < 1 A), the inductor current () returns to zero within each switching period, resulting in six distinct operational states per full cycle .

           1. Resonant Charging (State 1): SW1 and SW3 turn on with zero current. A series resonant circuit formed by and

              charges the flying capacitor from 0 V toward . The flying capacitor voltage and inductor current evolve as:

              • ZVS is preserved on the high-side and synchronous rectifier turn-on.

              • Minor hard switching occurs on SW5 turn-off, but overall losses remain low.

3. Control Strategy

   Output voltage is regulated via switching frequency modulation (not duty cycle), leveraging the energy-per-cycle relationship:

   =

   where = /is the effective load. This eliminates the need for:

   • Complex PWM generators

   • Current-mode controllers

   • Digital compensators

4. Design Rationale for Academic Prototyping

• The proposed system was selected over alternatives (Section II) due to:

• No custom magnetics (only 1 standard inductor)

• Passive soft-switching (no active snubbers or DSP tuning)

• Minimal component count (5 MOSFETs, 1 flying cap, 1 inductor)

• Scalability from 100 mW to 50 W with the same topology

IV WORKING PRINCIPLE

The proposed converter operates by fully charging and discharging a small flying capacitor () between 0 V and in every half-switching cycle. This quasi-resonant

1. Linear Energy Transfer (State 2): When = , the switching node voltage = = 0, allowing SW5 to turn on with Zero-Voltage Switching (ZVS). Energy is transferred linearly to the output as ramps down.

2. Low-Amplitude Oscillation (State 3): After reaches zero, SW5 turns off with Zero-Current Switching (ZCS). A small residual oscillation occurs but carries negligible energy.

   46. Symmetric Discharge Phase: The second half-cycle mirrors states 13, with SW2 and SW4 active, fully discharging back to 0 V and transferring the remaining energy to the load.

   Critically, all switching transitions in DCM exhibit either ZVS or ZCS, eliminating crossover losses.

1. Continuous Conduction Mode (CCM)

   At higher loads, remains positive throughout the cycle, eliminating the low-amplitude oscillation states (States 3 and 6). The converter still fully charges and discharges , preserving:

   • ZVS turn-on for SW2, SW3, and SW5 (due to = 0at switching instants),

   • ZCS turn-off for SW1SW4 (due to SW5 clamping the inductor current path).

   However, SW5 experiences a hard turn-off in CCM because

   > 0at switch-off, resulting in minor switching loss. Despite this, most edges remain soft-switched, maintaining high efficiency.

2. Voltage Regulation Mechanism

The converter draws a fixed energy packet per cycle:

Output Capacitor100 µF ()

MOSFETs

(SW1SW5)

Ideal capacitor

Ideal switches wih

Load Current0.1 A (DCM) Variable resistive

By conservation of energy ( = ), the output voltage is:

Range

to 10 A (CCM)

load

where is the switching frequency and = /. Thus, the output voltage is regulated solely by adjusting enabling simple frequency-based control without PWM

B. Control and Switching Logic

• SW1SW4: Driven by Pulse Generator at frequency

  (20500 kHz).

• SW5 gating:

complexity.

V SYSTEM IMPLEMENTATION

o Turn-on: when =

1. Simulation Platform and Topology

   The converter was modeled using Simscape Electrical in MATLAB/Simulink 2024b. The topology (Fig. 1) replicates the five-switch structure from: SW1SW4 form two half-bridges with fixed 50% complementary duty cycles, while SW5 acts as a synchronous rectifier gated based on zero- voltage and zero-current conditions. A single flying capacitor (), inductor (), and output capacitor (Complete the power stage.

2. Component Selection and Modeling

   • Turn off: when 1 ZCS

     • Regulation: Open-loop frequency sweep to verify

     Vout=VinRCflyf

3. Simulation Settings

• Solver: ode23tb

• Max step size: 10 ns

• Simulation time: 2 ms

VI. DISCUSSION

Simulation results confirm the core claims of the original topology: full soft-switching in DCM, partial soft-switching in CCM, and frequency-based regulation governed by a

Ideal inductor (DCR ignored in Phase 1)

1. DCM Operation: Full Soft-Switching

   Simulated waveforms for 48 V 5 V at 100 mA

   (DCM). The flying capacitor voltage fully charges to 48

   V and discharges to 0 V every half-cycle. At the instant

   = , the switching node voltage = = 0, enabling ZVS turn-on of SW5. Inductor current ramps linearly to zero, allowing ZCS turn-off of SW5. All other switches (SW1SW4) also switch with ZVS/ZCS. No switching losses occur in DCM.

2. CCM Operation: Partial Soft-Switching

   CCM at 10 A. remains continuous, eliminating low-amplitude oscillation states. ZVS is preserved on SW2, SW3, and SW5 turn-on due to full discharge. However, SW5 turns off with hard switching (non-zero ), introducing minor switching loss. All other transitions remain soft-switched.

3. Frequency-Based Regulation

   Simulated vs. switching frequency(f) for 5 V and

   3.3 V outputs. Data a.ligclosely theoretical curve, =

   , confirming that the output voltage is regulated solely by No PWM or duty-cycle modulation is needed. This validates the constant-energy-per-cycle principle.

4. Mode Transition and Efficiency Estimate

The boundary between DCM and CCM occurs at

0.8A for = 4.7 , = 68 , matching the theoretical boundary current [1]. Using conduction loss models ( = 2 ) and negligible switching loss in DCM, estimated peak efficiency exceeds 91% at 16 W (48 V5 V) and remains >80% even at 100 mWdemonstrating strong light-load performance where conventional FCML converters degrade.

VII. Conclusion and Future Work

Thi paper presented a simulation-based validation of a soft-switched quasi-resonant flying capacitor DCDC converter for high step-down (48 V to 15 V), low-power applications. Using MATLAB/Simulink 2024b, the converter was modeled in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). Results confirm that:

• In DCM, all switching transitions achieve zero- voltage switching (ZVS) or zero-current switching (ZCS), eliminating switching losses.

• In CCM, soft-switching is preserved on most edges, with only minor hard-switching on the synchronous rectifier turn-off.

• Output voltage is accurately regulated via switching frequency, following the theoretical law =

  .

• The topology requires only standard passive components (one inductor, one 68 nF flying capacitor) and no custom magnetics, making it highly suitable for low-cost academic prototyping.

Future work :

1. Building a physical prototype using off-the-shelf MOSFETs and passive components.

2. Implementing a closed-loop digital controller (e.g., PI-based pulse-frequency modulation) on a microcontroller or FPGA.

3. Measuring experimental efficiency, thermal performance, and dynamic response under load transients.

4. Exploring light-load optimization and EMI characteristics in real-world 48 V POL scenarios (e.g., USB-C charging, automotive sensors).

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