 Open Access
 Total Downloads : 33
 Authors : Yash Choudhary, Prof. Sanjiv Kumar
 Paper ID : IJERTCONV4IS32012
 Volume & Issue : VIMPACT – 2016 (Volume 4 – Issue 32)
 Published (First Online): 30072018
 ISSN (Online) : 22780181
 Publisher Name : IJERT
 License: This work is licensed under a Creative Commons Attribution 4.0 International License
A Review of DCDC Power Converter Topologies for High Frequency Operation
Yash Choudhary1 Prof. Sanjiv Kumar2
1B.Tech scholar, 2HOD ECE
ECE VIT(East), Jaipur VIT, Jaipur
Abstract This paper presents a review of ZVS (Zero VoltageSwitching) and ZCS (ZeroCurrentSwitching) resonant DCDC converter topologies. It represent that with the help of general topologies of DCDC Converters, numerous equivalent topologies of converters can be obtain. The general topologies of the converters also shows about parasitic capacitances and inductances which can be consumed into resonant circuit. By using this fact, topologies of DCDC converters suitable for high frequency operation are obtained. In these topologies parasitic reactances are included without any harm in resonant circuits.
Keywords PWM DCDC converter, ZVS resonant DCDC converter, ZCS resonant DCDC converter, isolated DCDC converter.

INTRODUCTION
TRADITIONAL PWM converters are operate under hard switching conditions, where voltage and current of semiconductor devices are changed suddenly from peak value to zero during turnon and turnoff. That causes switching losses and creates electromagnetic interference (EMI).These switching losses are due to diode capacitance, leakage inductance of transformer and output capacitance of transistor, Switching losses and electromagnetic interference level can be reduced by softswitching techniques at the time of increased device stress and conduction loss in DCDC power converters [1]. For this purpose ZVS and ZCS resonant DCDC converters are used. The operating principle of the converters mainly depends on ZVS and ZCS technique [2]. These were first introduced in the 1970s and early 1980 in class E ZVS and ZCS amplifiers and oscillators.
In this technique the circuit operates in such a way that transistor is either turnon at zero voltage or turnoff at zero current. Means the voltage across transistor is zero when transistor is on. Hence energy stored in output capacitance of transistor is zero at turnon. Due to this, switching loss during turnon is reduced to zero and efficiency increased at high switching frequencies [3]. It is seen that softswitching DC DC converters topologies absorbs different parasitic components, like leakage inductance of transformer, diode capacitance[4]. Hence a device turnon at zero voltage in ZVS technique and turnoff at zero current in ZCS technique. This allows for high switching frequencies, reducing the size and weight of the resonant ZVS and ZCS DCDC converters. The main aim of this paper is to represent, general topologies of ZVS and ZCS resonant DCDC converter than further best possible topologies from absorbing parasitic capacitance and inductance point of view into resonant circuit[520].

GENERALTOPOLOGIES
In PWM converters, power BJT, power MOSFET, GTO or IGBT is operate periodically as a switch at frequency(f). The basic circuits of nonisolated and isolated PWM convertersare shown in Fig.1.The boost and buck converters do not contain transformer isolation because DC input energy is directly transferred to the DC output without conversion into AC. Hence the working principle of sepic converter is different from boost converter and operation of forward converter is different from buck converter. Nonisolated or transformer less topologies of it are presented here. This converter requires a reset circuit which contains a diode and an inductor coupled with inductor Lf. When switch is turnedoff, the current in inductor is not zero. Since at that time the diode turnoff (reverse bias), energy stored in inductor Lf may produce high voltage spikes across the switch. However, this energy is transfer back to the DC input voltage source by reset circuit. The sepic converter may work as a stepup or stepdown converter. It depends upon duty cycle of switch.
The dual sepic converter is dual to sepic converter. It can also be derived from the forward converter by placing a coupling capacitor in place of its rectifier diode. Sepic converter does not require reset circuit and its DC voltage transfer function may be either greater or lower than 1, resulting stepup or stepdown converter. The main concept of converters is such that the voltage and current waveforms across switch may be rectangular or triangular. it shows that, during ideal case, the voltage and current across switch have reaches at time instants during switch turnson and/or off. When transistor is not ideal switch, waveforms of current and voltage cannot change their values abruptly. As the voltage and current across transistorswitch are not zero during switching times, there will be switching losses. As the switching frequency (f), increases these losses increase proportionally to this frequency and reducing the efficiency of converter. Due to this, the switching frequency (f)and is limited in PWM converters. Stress will also be on device during switching times due to high spikes in transistor voltage and current. To improve the performance of the converters, ZCS and ZVS DCDC converters derived from PWM converters can be achieved by adding a resonant circuit as follows
(A). Resonant capacitance C is connected in parallel with
Figure 2.
NonisolatedTopologiesIsolated Topologies
Figure 1.
PWM DCDC converters basic topologies.
Figure 2.
Isolated ZVS resonant DCDC converters basic and general topologies.
Waveforms of voltage across C and current through L do the switch and the resonant inductance L is connected in series with the parallel combination of switch and capacitance C in the ZVS converter. Basic topologies of ZVS converters shown in figs. 2 and 3.As resonant capacitor C is connected in parallel with switch, normal Voltage across switch can be obtained, in that way elimination of turnon switching loss. (B). similarly resonant inductance L is connected in series with the switch, and resonant capacitance C is connected in parallel with the series combination of the switch and the Inductance L in ZCS converters. This process also provides basic topologies of ZCS converters shown in Figs.4 and 5. As resonant inductance L is connected in series with switch, it is possible to find out current through switch, in that way elimination of turnoff switching loss.
The combination of general topologies can be performed as follows. It is seen that in all converters Cf<<C and Lf<<L where Cf is large coupling or blocking capacitance and Lf is a large choke inductance.Inductance Lf is open circuit for AC component and L is a short circuit for DC component. Due to this Lf can be connected to any terminal of resonant inductance L. So there are two possible connections of L for the buck converter shown in Fig. 3. Resonant capacitance C can be connected to any terminal of DC input source Vi because the DC input voltage Vi is a short circuit for the DC component resonant capacitor C is open circuit for DC component. During ideal case, Cf is a short circuit for the AC component due to this resonant capacitor C can be connected to any terminal of Cf. So C has two or more possible connections as shown for e.g.,
Figure 3.
Nonisolated ZVS resonant DCDC converters basic and general topologies.
Figure 4.
Nonisolated ZCS resonant DCDC converter basic and general topologies.
buck converter in Fig. 3.It is important to know that not depend upon connection of L and C. The waveforms are can be shifted by DC component for different L and C connections. The voltage and current across switch and diode remain samefor all possible positions of L and C. Iput and output ripple voltages or current are changed by a component introduced by L and C.
The resonant capacitance C and inductance L may be divided into parts and their components can be connected in all possible ways simultaneously. (C=C1+C2+C3+C4or L=L1+L2+L3 for Cuk and dualsepic converters) which give generalized topologies of converters shown in Fig. 25. It is important to know that Cuk and dualsepic ZCS generalized topologies have two forms; in first L and C have three positions and in second L have two positions and C have four positions. Due to this type of connections some of L and C components may be parasitic inductance and capacitance which present in converter. It is easy to find that which of
them are absorbed in LC resonant circuit and which are not. By using this fact a converter with
Figure 5.
Isolated ZCS resonant DCDC converters basic and general topologies.
Figure 6.
Symbols used to indicate reactance.
better performance can be design. Symbols used to indicate reactance shown in Fig.6. (a) Externalresonant capacitance.
(b) Parasitic capacitance which can include in resonant capacitance. (c) Parasitic capacitance which cannot be included in resonant capacitance. (d) External resonant inductance or parasitic inductance which can be included in resonant inductance. (e) Parasitic inductance which cannot be included in resonant inductance.

TOPOLOGIES SUITABLEFOR HIGH FREQUENCY OPERATION
It is evident from last II section, that there are different topologies of every converter in which ideal case is considered of elements and connections. But it is not possible always. The suitable topologies are given in Fig. 89. We consider high frequency operation so our main focus on LC
parasitic. Let us see an example of buck ZVS converter with no optimal topologyas given in Fig.7. Buck ZVS topology has many of parasitic inductances and
Figure 7.
Buck ZVS converter with parasitic inductance
switch because it is large which may createdisturbances when operating for high frequencies. For this we can add a resonant capacitance on the secondary side which will include diode capacitance, or
parasitic capacitance C connected in shunt with switch, position of C is best suitable because firstly, the switch parasitic capacitance is added inC when switch inductance and capacitance are zero. Secondly, the parasitic inductance shown can be added in the inductance which is present in basic topology. The inductances L1, L2,L3,L4,L5 gives the resonant inductance L. Lfwhich is also called output choke is an important element from filter point of view.
The inductance of this choke is large due to this, parasitic capacitance of it will be large. This large capacitance may interact to inductance of choke and give disturbance in operation of converter. Thats why choke capacitance is not added in C which is disadvantage of this topology. Inductances L1, L2, L3, L4, and L5 may behave like an antenna that may be responsible for electromagnetic induction (EMI) and radiation losses. The best suitable or optimal ZVS topologies are given with nonisolated and isolated configuration in Fig. 8. In nonisolated optimal topology, parasitic capacitance of switch and choke is possible to include in C. Thick line shows connection required for this thing in Fig.8. It is evident that these types of connections should be among choke, voltage source and capacitor. Cf is also used as a filtering element which decreases the parasitic inductance. In this the parasitic capacitance of diode is not added because it may disturb the operation or response of system. For reducing this effect diode, should be select accordance to voltage and current requirement. Similarly the ZCS converters optimal topologies are represented in Fig.9. The nonisolated topologies allow adding parasitic capacitances of choke.
They are also adds parasitic capacitance of diode. In ZCS topologies the parasitic capacitance of switch do not included. The isolated topologies (transformer) shown in Fig.89. The resonant effects are considered so the circuit takes part in resonance from both side of transformer. L and C may be present on both sides. Hence topologies obtained by this way,the topology which is near to ideal one selected as optimal due to this all ZVS topology permit us to include leakage inductances. A resonant capacitance should be located at primary, for including parasitic capacitance of switch and primary capacitance. Similarly a resonant inductance should be connected at secondary side which will add inductance of transformer. It should be connected on secondary side until primary capacitance is less than output capacitance. ZVS topologies not include parasitic capacitance of rectifier diode. Similarly the isolated ZCS topologies as like nonisolated, it not adds the parasitic capacitance of
Figure 8.
Nonisolated and isolated ZVS convertersoptimal topologies.
on primary side which will include secondary capacitance in

Hence it is evident from above section that ZVS converter has a disadvantagethat is parasitic capacitance of rectifier diode. This capacitance may interact with resonant inductance L and may produce disturbances. ZVS converters can be improved by using resonant rectifier. It is shown in Fig. 10. It contains mainly a diode, shunt capacitor and series inductor. So the parallel capacitance absorbs diode parasitic capacitance. It is possible to control frequencies,due to this at zero voltage; diode can be on or off. Generally in ZVS converter, the switch commutated at voltage zero and diode at current zero. Similarly in ZCS converter diode is commutated at voltage zero and switch at current zero. Hence we can improve the converters by connecting a capacitor in shunt along with diode in ZVS converters and by connecting a capacitor in shunt along with switch in ZCS converters.
The converters obtained by this way, diode rectifier and switch turnon and off at voltage zeroknown as DZVS resonant converters shown in Fig.10 (I).The resonant inductance L can be connected in diode branch or in switch branch. Whereas, in isolated topologies, it can be connected at primary side or at secondary side. Similarly in ZCS improved converters switch and diode commutated at current zero called DZCS resonant converters shown in Fig.10 (II). It
is seen that DZCS converters are not suitable for operating at high frequencies in comparison of DZVS converters because it do not neutralize the switch and diode capacitance.
Figure 9.

Nonisolated ZCS converter optimal topologies
Figure 9.

Isolated ZCS converter optimal topologies

(II)
Figure 10.
Resonant circuits

: DZVS

: DZCS





CONCLUSION
The basic and general topologies of ZCS and ZVS resonant converters are shown. Resonant DCDC power converter topologies are shown which include parasitic capacitance and inductance. For ZCS converters it is seen that leakage inductance of transformer can be absorbed by L if capacitance C is connected on transformer secondary and for ZVS converter leakage inductance of transformer may be include into L. it is also seen for ZCS converters that the parasitic capacitance of Lfincluded in C and in ZVS converter the parasitic capacitance Lf absorbed by C. The output capacitance of transistor cannot include in C and diode capacitance is absorbed by C in ZCS converters. Whereas output capacitance of transistor absorbed by C and inductance of diode is include in L. it is also formulated that transformer capacitance can be include in C if C is connected on transformer primary in ZCS converters.
The main problem of ZVS converters is rectifier diode parasitic capacitance. This capacitance may interact with resonant L and may produce oscillations in response. We can improve the performance of ZVS converters with the help of resonant rectifiers. DZVS and DZCS resonant convrter topologies can be include in resonant circuits. DZVS resonant converters parasitic reactances are included. It is evident that DZCS resonant converters are not so suitable at high frequencies because switch and diode capacitance cannot be neutralized. It is also seen that efficiency of buck and boost converters are more in comparison of other converters because it does not contain isolation so there will be direct energy transfer from input to output without any conversion.
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