A Modern Approach of Three Phase Four Wire DVSI for Pq Improvement using SRF Theory

DOI : 10.17577/IJERTV5IS030623

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  • Authors : A. Dheepanchakkravarthy, A. Naveen Kumar , S. Abdul Raghuman, N. Ajith Kumar, Prof. Jebasalma
  • Paper ID : IJERTV5IS030623
  • Volume & Issue : Volume 05, Issue 03 (March 2016)
  • DOI : http://dx.doi.org/10.17577/IJERTV5IS030623
  • Published (First Online): 30-03-2016
  • ISSN (Online) : 2278-0181
  • Publisher Name : IJERT
  • License: Creative Commons License This work is licensed under a Creative Commons Attribution 4.0 International License

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A Modern Approach of Three Phase Four Wire DVSI for Pq Improvement using SRF Theory

A. Naveen Kumar, S.Abdul Raghuman

A. Dheepanchakkravarthy

Prof. Jebasalma

N. Ajith Kumar

Assistant Professor

Professor

UG Scholars, Department of EEE

Department of EEE

Department of EEE

Indra Ganesan Coll. of Engg.,

Indra Ganesan Coll. of Engg.,

A.C. Coll. of Engg and Tech.,

Trichy, Tamilnadu, India

Trichy, Tamilnadu, India

Karaikudi, Tamilnadu, India

Abstract – The Dual voltage source inverter (DVSI) scheme is proposed to improve the power quality and reliability of the micro grid systems. The proposed scheme is comprised of two inverters, which enables the micro grid to exchange power generated by the distributed energy resources (DER). The two inverters are main voltage source inverter (MVSI) and auxiliary voltage source inverter (AVSI). DVSI scheme, in which the power generated by the micro grid is injected as real power by the MVSI and the reactive power and harmonics is performed by the AVSI. The MVSI can always be used to injected real power to the grid, if sufficient renewable power is available at the dc link. In the DVSI scheme, as total load power is supplied by two inverters, power losses across the semiconductor switches of each inverter are reduced. This increases its reliability as compared to a single inverter with multi-functional capabilities. The control algorithms are developed by synchronous reference frame theory (SRFT) to operate the DVSI in grid connected mode. These features make the DVSI hopeful option for supplying sensitive loads. This proposed result is verified with MATLAB simulation.

Keywords DVSI, SRFT, Harmonics mitigation, Neutral Current Compensation

  1. INTRODUCTION

    The power system is model shift with more renewable energy sources integrated to the network by means of distributed generation (DG). These DG units with coordinated control of local generation and storage facilities form a micro grid. A grid interactive inverter plays an important role in exchanging power from the micro grid to the grid and the connected load. Micro grid is otherwise called as localized grid. Generally the unbalanced load forms low voltage on one leg, power delivery problems and resistance breakdown problems inside the motor or system. Sag forms RMS voltage decreases between the normal operating voltages. Harmonics forms by a frequency changes, fluctuation and more distortion. If there is a considerable amount of feeder impedance in the distribution systems, the propagation of these harmonic currents distorts the voltage at the point of common coupling (PCC). At the same instant, industry automation has reached to a very high level of comfortable, plants like auto mobiles manufacturing units, chemical factories, and semiconductor industries required accurate power.

    In this paper, we proposed DVSI scheme, in which the power generated by the micro grid is injected as real power by the MVSI and the reactive, harmonic, and unbalanced load compensation is performed by AVSI. This has an advantage

    that the rated capacity of MVSI always can be used to inject real power to the grid. In the DVSI scheme, as total load power is supplied by two inverters, power losses across the semiconductor switch of each inverter are reduced. This increases its reliability as compared to a single inverter with multifunctional capabilities. Also, smaller size modular inverters can operate at high switching frequencies with a reduced size of interfacing inductor, the filter cost gets reduced. Moreover, as the main inverter is supplying real power, the inverter has to track the fundamental positive sequence of current. This reduces the bandwidth requirement of the main inverter. The inverters in the proposed scheme use two separate dc links. The auxiliary inverter in supplying zero sequence of load current on three phase three leg inverter topology with the single DC storage capacitor can be used for the main inverter. It reduces dc link voltage requirement of main inverter. Thus the use of two separate inverters in the proposed DVSI scheme provides increased reliability, better utilization of micro grid power, reduced dc grid voltage rating, less band width requirement of main inverter in reduced filter size. In DVSI scheme which has two inverters of six semiconductors switches, gate pulses are given by the control algorithms of SRFT to operate DVSI in grid connected mode, while considering flexible grid voltage. Phase, frequency and magnitude were equalized by above system. The extraction of fundamental positive sequence of PCC voltage is done by dq0 transformation. The control strategy is tested with two parallel inverters connected to a three-phase four-wire distribution system. Effectiveness of the proposed control algorithm is validated through detailed simulation results.

  2. BLOCK DIAGRAM REPRESENTATION

    The proposed block diagram of DVSI system is shown in Fig.1. It consists of a neutral point clamped (NPC) inverter to realize AVSI and a three-leg of four wire system for DVSI. These are connected to grid at the PCC and supplying a nonlinear and unbalanced load. The function of the AVSI is to compensate the reactive, harmonics, and unbalance components linearly in load currents. Here, load currents in three phases are represented by ila, ilb, and ilc respectively. Also, is(abc), im(123), ia(123) and isn shows grid currents, MVSI currents, AVSI currents and source neutral current in three phases, respectively. The dc link of the AVSI utilizes a split capacitor topology, with two capacitors Vdc1 and Vdc2.

    Fig.1 block diagram representation

    The MVSI delivers the available power at DER to grid. The DER (Vdcm) can be a dc source or an ac source with rectifier coupled to dc link. The power generated from these sources use a power conditioning stage before it is connected to the input of MVSI. In this study, DER is being represented as a dc source. Due to the controller of SRFT, it mainly works on the pulse is given to their DVSI switch then the system has to be equalized.

  3. SYSTEM CONFIGURATION AND DESIGN

    The schematic diagram proposed DVSI topology is shown in fig.2. The DVSI consist of NPC to realize AVSI and the MVSI consist of inverter. Due to unbalanced load and nonlinear load, the feeder impedance in the PCC voltage is affected with harmonics. Unbalanced load has three different RL loads. Each RL load has different phase unit which depends on consumer loads so, the system has to be unbalanced conditions. The unbalanced conditions are converted into balanced condition using SRFT.

    Fig.2 schematic diagram of unbalanced load and nonlinear load

    1. DC CAPACITOR VOLTAGE

      The minimum dc bus voltage for VSI of DVSI should be greater than twice the peak of the phase voltage of the system. The dc bus voltage is calculated as

      Vdc = 22VLL / 3 m

      Where m is the modulation index and is considered as 1 and VLL is the ac line output voltage of DVSI. Thus, Vdc is obtained as 650V for VLL of 415 V.

    2. DC BUS CAPACITOR

    The value of dc capacitor (Cdc) in VSI of DVSI depends on the instantaneous energy available to the DVSI during transients. The principle of energy conservation is applied as

    (1/2) Cdc [(Vdc)2 – (Vdc1)2] = 3V(a I) t

    Where Vdc is the reference dc voltage and Vdc1 is the minimum voltagelevel of dc bus, a is the overloading factor, V is the phase voltage, I is the phase current, and t is the time by which the dc bus voltage is to be recovered. Considering, a 1.5 %( 10 V) reduction in DC bus voltage during transients, Vdc1 = 690 V, Vdc = 650V, V = 239.60 V, I = 28.76 A, t =

    50 s, a = 1.2, the calculated value of Cdc is 2000 F and is selected as 2000 F.

  4. CONTROL OF DVSI

    The control approaches available for the generation of reference source currents is synchronous reference frame theory, instantaneous symmetrical component theory (ISCT), etc. The SRFT is used in this investigation for control the DVSI. A block diagram of the control scheme is shown in fig.3. The load currents (iLa, iLb, iLc), the PCC voltages (vsa, vsb, vsc), MVSI currents (isma, ismb, ismc) and AVSI currents (isaa, isab, isac) of DVSI are sensed as feedback signals. The load currents of a-b-c frame are converted to the d-q-0 frame using Parks transformation.

    The proposed control strategy is aimed to compute mainly the three phase reference current at the load terminal. The shunt active filter based on SRFT method can be used to solve the current related power quality problems such as current harmonics. The SRFT method is used in active filter for generating reference current signal.

    Fig.3 SRFT based control algorithm

    To implement the SRFT method and for reference current calculation the phase locked loop (PLL) is used to generate the transformation angle (wt) which presents the angular position of the reference frame. The comparison between reference load current and sensed load current in sinusoidal PWM technique generate a gating pulse for voltage source inverter (VSI). The current controlled PWM controller compare the reference source current signals with actual source current and generate the switching signal for IGBTs used in DVSI.

  5. MODELING AND SIMULATION

    The SRFT based DVSI connected to the three phase four wire system is modeled and simulated using the MATLAB/ SIMULINK. The system data are given in the appendix I. The reference source currents are derived from the sensed PCC the load currents (iLa, iLb, iLc), the PCC voltages (vsa,vsb,vsc), MVSI currents (isma, ismb, ism.) and AVSI currents (isaa, isab, isac) and the dc bus voltage of DVSI (Vdc).

    1. Simulation of three-phase four wire distribution system for unbalanced load without controller circuits

      The system consists of unbalanced RL load is shown in fig.4. The source voltage (vs), source current (is), load current (il), load neutral current (iln), active and reactive power (pq) are measured from the corresponding scopes.

      Fig.4 simulation of three phase four wire distribution system for unbalanced load without controller circuits

    2. Simulation of three-phase four-wire distribution system for unbalanced load with DVSI controller circuits

      The system consists of three-phase unbalanced RL load, DVSI block, SRFT control block and measurement scopes are shown in fig.5. During unbalanced load condition, due to effective control of SRFT based DVSI the unbalanced loads are transferred to balanced load and the results are measured from the corresponding scopes.

      Fig.5 Simulation of three-phase four wire distribution system for unbalanced load with DVSI controller circuits

    3. Simulation of three-phase four wire distribution system for non-linear load without controller circuits

      The system consists of nonlinear load is shown in fig.6. The source voltage (vs), source current (is), load current (il), and total harmonic distortion (THD) are measured from the corresponding scopes.

      Fig 6 Simulation of three phase four wire distribution system of non linear load without controller circuit

    4. Simulation of three-phase four wire distribution system for non-linear load with DVSI controller circuits

    The simulation of nonlinear load based DVSI system is shown in fig.7. The source voltage (vs), source current (is), load current (il), MVSI and AVSI of filter currents (ism and isa) and total harmonic distortion (THD) are measured from the corresponding scopes.

    Fig 7 Simulation of three-phase four wire distribution system for non-linear load with DVSI controller circuits

  6. RESULTS

    1. Performance of three-phase four wire system for unbalanced load without controller circuits

      The wave forms of source voltage (vs), source current (is), load neutral current (iln), active and reactive power (pq) are measured from corresponding scopes of fig 4. and shown in fig.8. The source currents are unbalanced and source voltage and currents are not in phase also 2.88A currents flows through the neutral conductor.

      1. Source voltage (vs)

      2. Source current (is)

      3. Sourec Neutral current (isn)

        5

        0

      4. Active and reactive

        Fig.8 Performance of Three-phase Four-wire system for unbalanced load without controller circuits

    2. Performance of three-phase four wire system for unbalanced load with controller circuits

      The source voltage (vs), source current (is), source neutral current (isn), MVSI filter current (ism), AVSI filter current (ifa) are measured from corresponding scopes of fig.5 and shown in fig.9. During unbalanced load condition, due to helpful control of SRFT based DVSI the unbalanced loads are transferred to balanced load and source voltage and currents are same in phase also the neutral current is reduced from 2.88A to 0.2A.

      1. Source voltage (vs)

      2. Source current (is)

      3. Load voltage (vl)

      4. Load current (il)

        -5

        0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

        Time

      5. Source neutral current (isn)

      6. Active and Reactive power

      7. MVSI filter current (ifm)

      8. AVSI filter current (ifa)

        Fig.9 Performance of three phase four wire system for unbalanced load with controller circuits

    3. Performance of three-phase four wire system for nonlinear load without controller circuits

      The waveforms are measured from corresponding scopes of fig.6.and shown in fig.10. During non linear load condition, the source current and load current both contain harmonics. The source current contain THD of 30.09%.

      1. Source voltage (vs)

      2. Current source (is)

      3. THD

        Fig.10 Performance of three-phase four-wire system for non linear load without controller circuits

    4. Performance of three-phase four wire system for non linear load with controller circuits

      The Source voltage (vs), Source current (is), MVSI source current (ifm), AVSI filter current (ifa) are measured from corresponding scopes of fig.7 and shown in fig.11. Due to the extraordinary control of SRFT based DVSI, the non sinusoidal source currents are transferred to sinusoidal current and the source current THD is reduced from 30.09% to 0.36%.

      1. Voltage source (vs)

      2. Source current (is)

      3. Load voltage (vl)

    1. MVSI filter current (ifm)

    2. AVSI filter current (ifa)

    3. THD

    Fig.11 Performance of three-phase four wire system for non linear load with controller circuits

  7. CONCLUSION

The performance of exchange power from distribution system has been demonstrates for neutral current compensation, harmonic reduction, load balancing for nonlinear and unbalanced load. The proposed DVSI distribution system of with and without controller circuits for nonlinear and unbalanced load was discussed in above section and following observation is obtained. Thecontrol algorithms are developed to generate reference currents for DVSI. The vdcm has regulated to reference value of 650V under all load disturbances, THD of the system is maintain below 5% as per IEEE standard. A DVSI has many advantages such as increased reliability, lower cost due to the reduction of filter size and more utilization of inject real power from distribution system to micro grid system. The use of three phase four wire system topology for the main inverter reduces the dc link voltages requirement. From the above discussion, the proposed techniques A MODERN APPROACH OF THREE PHASE FOUR WIRE DVSI FOR PQ IMPROVEMENT USING SRF THEORY is efficient

for power quality improvement of three phase four wire system.

APPENDIX-I

AC line voltages: 415V

(d) Load current (il)

Fundamental frequency: 50Hz

Feeder impedance: Rg=0.5 , Lg=1mH AVSI: C1=C2=2000F

Lfa=0.2mH

Rfa=10

MVSI: DC line voltages Vdcm=650V Lfm=5F, Rfm=1k

Unbalanced load: P1=500W, Q1=50VAR

P2=1000W, Q2=100 VAR P3=1500W, Q3=150 VAR

Non linear load: Three-phase diode bridge rectifier followed

by RL load with R=35, L=0.06H.

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