- Open Access
- Authors : Divya Subramanian
- Paper ID : IJERTV12IS050153
- Volume & Issue : Volume 12, Issue 05 (May 2023)
- Published (First Online): 06-05-2023
- ISSN (Online) : 2278-0181
- Publisher Name : IJERT
- License: This work is licensed under a Creative Commons Attribution 4.0 International License
A Cascaded H-Bridge Multilevel Inverter Topology with a Bidirectional Switch
Department of Electrical and Electronics Engineering Nirmala Institute of Technology
Abstract In recent years, multilevel inverters (MLIs) have emerged to be the most empowered power transformation technology for numerous operations such as renewable energy resources (RERs), flexible AC transmission systems (FACTS), electric motor drives, etc. MLI has gained popularity in medium- to high-power operations because of numerous merits such as minimum harmonic contents, less dissipation of power from power electronic switches, and less electromagnetic interference (EMI) at the receiving end. The MLI possesses many essential advantages in comparison to a conventional two-level inverter, such as voltage profile enhancement, increased efficiency of the overall system, the capability of high-quality output generation with the reduced switching frequency, decreased total harmonic distortions (THD) without reducing the power of the inverter and use of very low ratings of the device. Although classical MLIs find their use in various vital key areas, newer MLI configurations have an expanding concern to the limited count of power electronic devices, gate drivers, and isolated DC sources. In this paper, a new topology for a cascaded multilevel inverter with a bidirectional switch is presented. A deduction in the cascaded H-bridge inverter switch count of seven against eight compared to a conventional multilevel inverter and two dc supplies constitutes the proposed five level inverter. The reduced switch inverter can be utilized in electric vehicle drives and renewable energy systems.
Keywords cascaded inverter, multicarrier modulation, total harmonic distortion.
Multilevel inverters are DC-AC static power converters exhibiting at their output terminals more than two-level voltage waveforms. Nowadays they find increasing attention especially for medium-voltage and high-power applications [1, 2]. In the mid 1970s, Baker and Bannister have proposed the first multilevel inverter . It consists of series connected single phase H-bridges. Later, Nabae et al. developed another multilevel inverter called 3L-NPC (Neutral Point Clamped diodes) . In such topology, several diodes ensure levels construction of output voltage by linking capacitive sources to switches. Following the NPC, a Flying Capacitors topology (FLC) was proposed by putting clamping capacitors instead of diodes . Therefore, cascaded H-bridge, NPC and FLC are the basic and most used multilevel inverters. After that, multitude of derived and hybrid multilevel topologies were introduced [6-16]. However, they still on the shadow of the major multilevel configurations previously stated. The most industrialized multilevel topologies are the three-level NPC (3L-NPC), the cascaded H-bridge (MLCHB), and the four-level flying capacitors (4L-FLC) . Typically, multilevel topologies have been used to overcome the limitations of conventional two-level inverters.
Particularly, the voltage stress on switching devices is decreased by putting in series power switches. The total harmonic distortion is reduced by adding steps or levels in the output voltage waveform fitted with the sinusoidal reference. In practice, this is achieved by multiplying the number of DC sources and also by considering their terminals as positions to be switched . Multilevel inverters features have several other promising advantages over two level topologies such as: i) the possibility to overcome the problem related to the maximum voltage drop of the main power semiconductors. ii) Transformer-less inverter architecture desirable in renewable energy applications . iii) Reduction of the common mode voltage which causes inherent damages of the bearings. iv) High resolution of the output waveforms [20, 21]. Therefore, the voltage adjustment is smooth which reduces the stress on the load, otherwise the voltage in conventional inverter varies between two values. The rating of passive filters, sometimes necessary to limit these stresses, can be also reduced. Consequently, the system wins more dynamic and allows faster regulation. v) Minimized electromagnetic interference issues . Multilevel inverters applications cover mainly the variable speed area as motors drives [23-26], pumps , conveyors [27, 28] and electric traction [29-31]. Multilevel inverters are also used for electrical power conditioning as voltage rectifier, static compensator (STATCOM), Back-to-Back inverter connected to the network [32-35]. Recently, they are associated with renewable energy systems in photovoltaic applications and wind generation [22, 36-39]. Thanks to the development of semiconductors dedicated to high power, particularly IGBTs at 3.3 kV, 4.5 kV and 6.5 kV, the power ranges associated to multilevel inverters were significantly extended to medium and high voltages (2-13 kV). Regarding control algorithms, the frequently used techniques are Selective Harmonic Elimination (SHE) and Pulse width modulation (PWM) . Advanced methods developed thereafter are improvements of those above. PWM based techniques are most relevant in industrial field including multi carriers and space vector modulation. With those techniques, we can reduce switching losses and achieve a low total harmonic distortion, so better voltage quality.
Numerous industrial applications have begun to require higher power apparatus in recent years. Some medium voltage motor drives and utility applications require medium voltage and MW power level. For a medium voltage grid, it is troublesome to
connect one power semiconductor switch directly. The application of ac variable frequency speed regulations are widely popularized, high power and medium voltage inverter has recently become a research focus so far as known there are many problems in conventional two-level inverter in the high-power application. Multilevel inverter has been gained more attention for high power application in recent years which can operate at high switching frequencies while producing lower order harmonic components -, A multilevel inverter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel inverter system for a high-power application  – . There are several topologies such as neutral point clamped inverter, flying capacitor based multilevel, cascaded H-bridge multilevel inverter, hybrid H-bridge multilevel inverter and new hybrid H-bridge multilevel inverter -.
The most attractive features of multilevel inverter areas follow
They can generate output voltage with very low distortion and lower rate of change of voltage.
They can generate very low distorted input current and can operate with a lower switching frequency.
The voltage handling capacity of the existing devices can be enhanced in multiple folds, not disturbing the complications of static and dynamic voltage sharing that occur in series connected devices.
Spectral performance of multilevel waveforms is superior to that of their two- level counterparts.
Multilevel waveforms naturally rectify the challenges of large voltage transients that occur due to the reflections on cables, which can damage the motor windings as well as adding extra problems.
FIVE LEVEL MULTILEVEL INVERTER
Figure 1 shows the circuit diagram of the reduced switch fivelevel inverter. The reduced switch topology can produce five levels of DC voltages (2Vs, Vs, 0, -Vs and -2Vs). This topology requires only five fully controlled unidirectional-blocking bidirectional- conducting switches and a single bidirectional-blocking-bi-directional conducting switch and two DC sources for attaining a five- level output. The low frequency requirement of higher voltage rated switches and reduced device count are the advantages. The topology attains a 12.5 % reduction in the number of main power switches compared to conventional cascaded five level inverter
% r = , where Nc represents number of switches of conventional five level inverter, Nr represents number of switches of reduced switch five level inverter and % r represents the percentage reduction in the number of main power switches). The topology developed has the advantage of operation of higher voltage rated switches at line frequency. The developed topology requires only three active switches for a particular voltage level in comparison with activation of four active switches required for generation of a specific voltage level in conventional cascaded five level inverter.
Figure 1 Power stage for new reduced switch five level topology
Figure 2 (a – e) shows the circuit diagrams for different voltage levels (modes of operation) for the new reduced switch five level topology. The diode rating has been taken based on the magnitude of five level inverter output voltage. The activated switches are represented in bold lines in each mode of Figure 2 (a – e).
Power circuit for Mode-1
Power circuit for Mode-2
Power circuit for Mode-3
Power circuit for Mode-4
Power circuit for Mode-5
Figure 2 Power stages for new reduced switch five level topology
The switching pattern for generation of control signals for reduced switch five level inverter is shown in Table 1
Table 1: Generation of control signals for Reduced switch five level inverter
III POWER STAGE OPERATION (R – LOAD)
The different modes of operation of reduced switch five level inverter with resistive load is as follows. Mode – 1: Switches Q1, Q4 and S1 acts to get maximum positive output voltage level of 2Vs.
Mode – 2: Switches Q1, Q4, S2a and DS2b acts to get half level positive output voltage level of Vs. Mode – 3: Switches Q3 and Q4 acts to get zero output voltage level.
Mode – 4: Switches Q2, Q3, S2a and DS2b acts to get half level negative output voltage level of Vs. Mode – 5: Switches Q2, Q3 and S1 acts to get maximum negative output voltage level of 2Vs.
IV MULTICARRIER SCHEME
Reduced switch MLI topology uses the possibility of multicarrier scheme for generation of control signals (MAHATO et al., 2018). Constant frequency carrier PWM with phase disposition (PD PWM) has been utilized for generation of carrier signals of reduced switch topology with a slight modification which is explained in this section. Sine wave of fundamental frequency can be considered as modulating signal and high frequency triangular waves are taken as carrier signals. The switching pattern for the reduced switch inverter is obtained with proper utilization of logical gates.
The main advantage of PWM inverters in power electronics is the reduction of harmonics and passive component sizes by operating at increasingly high frequencies. However, the switching losses increase as the switching frequency increases and the losses become significant at higher frequencies. Though low frequency switching can be implemented by using modulation strategies like selective harmonic elimination and space vector control, carrier based PWM methods are preferred due to the complication offered by the fundamental switching frequency methods (McGrath and Holmes, 2002). The multicarrier phase disposition technique has a superior line to line harmonic performance over other methods (Kant et al., 2015). High frequency rating of the higher voltage rated switches reduces the efficiency of carrier based PWM inverters. The reduced switch topology overcomes this disadvantage by switching the higher voltage rated switches at fundamental frequency.
The theoretical waveforms for representation of carrier pulses for the generation of control signals is shown in Figure 4. The logical equations for implementation of control circuit are summarized using Equations 1 – 4. C1 and C2 represents the control pulses generated by comparing sine wave with triangular carriers and P1 is a square pulse having duty cycle of 0.5 and frequency 50 Hz. P2 is the delayed pulse of P1 shifted by 0.001 s from the orgin.
Q = Q = (P 1(C 1 + P 2)) +
(P 1(C 1 + (P 2))
Q2 = Q3 = (P1(C1 + P2)) + (P1(C1 + (P2))
S1 = C2
S2 = C1C2
Modulation index (Ma) is defined as ratio of amplitude of modulating signal to carrier signals in PWM schemes. In multicarrier schemes, a greater number of triangular carriers are used to generate control pulses. Here two triangular carriers are required to generate a five-level output. So, a factor of (k-1) is multiplied to amplitude of each of carrier signals to obtain modulation index and is expressed by Equation 5.
Here k is the number of voltage levels per half cycle, Ac is the peak-to-peak value of carrier wave and Am is the peak value of modulating signal. Modulation index (Ma) for reduced switch five level inverter is given by Equation 6.
V CONTROL CIRCUIT
The control circuit of reduced switch five level inverter is represented in Figure 5 as per boolean equations 1 – 4. An increase in the number of pulses for output waveform of inverters produces a clean spectrum devoid of harmonics. The harmonic distortions can be reduced to a great extent by introducing low pass filter circuits following the output because the amplitude of high frequency signals will be less and can be easily filtered out. As the modulation index decreases beyond 0.5, the output voltage waveform approximates to two level inverter output voltage. Multicarrier modulation technique utilizes high frequency carrier signals either by phase disposition or phase shifting method. The reduced switch topology utilizes constant frequency phase disposition method of multicarrier modulation. PD PWM has been established to be an optimal solution for pulse width modulated inverters.
Figure 5: Control circuit for reduced switch five level inverter
VI .SIMULATION STUDIES
Simulation results of reduced switch five level inverter have been obtained using PSIM Professional Version 184.108.40.2060. Simulation results are helpful in analyzing THD of the inverter before visualizing harmonic effects in harmonic analyzer. High frequency triangular carriers of frequency 1 kHz with full wave rectified sine wave of frequency 50 Hz, two DC voltage sources which constitute a dual voltage supply of 30 V each and total voltage of 60 V have been selected. Simulated results for multicarrier modulating signals and switching pattern of the reduced switch five level inverter are shown in Figure 6 and Figure 7 respectively. It can be seen from Figure 7 that MOSFET switches S1 (14 pulses per half cycle) and S2 (20 pulses per half cycle) are high frequency switches with switching frequencies of 700 Hz and 1000 Hz respectively. But H-Bridge switches Q1Q4 (1 pulse per half cycle) will be having a switching frequency of 50 Hz. Simulation results for reverse blocking voltage waveforms across MOSFET switches are shown in Figure 5.8.
Output voltage waveform, current waveform and FFT Spectrum of new inverter for different modulation indexes (Ma) (Ma=1, Ma=0.8, Ma=0.6 and Ma=0.4) are shown in Figure 9 – 12. It is seen that as the modulation index decreases, the THD of inverter increases.
Figure 6: Multicarrier modulating signals
Figure 7: Switching pattern for reduced switch fie level inverter (Ma=1)
Figure 8: Reverse blocking voltage waveform across switches (Ma=1)
Results from simulation agrees with output pattern of a conventional five level inverter. Five distinct levels of voltages have been obtained in both cases. The analytical calculation of THD (V) for various modulation indexes has also been verified along with simulation results. It has been concluded that for small values of modulation index, PWM waveform degenerates into a
nearly squared waveform. The harmonic spectrum has been distorted for smaller values of modulation index less than unity. With proper selection of modulation index above 0.5, total harmonic distortion of the waveform can be made smaller.
Figure 9: Output voltage waveform, current waveform and FFT spectrum for reduced switch five level inverter (Ma=1)
Figure 10: Output voltage waveform, current waveform and FFT spectrum for reduced switch five level inverter (Ma=0.8)
Figure 11: Output voltage waveform, current waveform and FFT spectrum for reduced switch five level inverter (Ma=0.6)
Figure 12: Output voltage and current waveforms (Ro = 25)
Results from simulation agrees with output pattern of a conventional five level inverter. Five distinct levels of voltages have been obtained. FFT spectrums for different modulation indexes have been visualized experimentally. The analytical calculation of THD (V) for various modulation indexes has also been verified along with simulation results. It has been concluded that for small values of modulation index, PWM waveform degenerates into a nearly squared waveform. The harmonic spectrum has been distorted for smaller values of modulation index less than unity. With proper selection of modulation index above 0.5, total harmonic distortion of the waveform can be made smaller- The reduced switch inverter can be utilized in electric vehicle drives and renewable energy systems. Renewable energy systems play a key role in utilization of electric power. These renewable sources can be easily interfaced to multilevel inverters where reduced switch five level inverter can be utilized. It can also be used in power factor compensators and active filters. As the main switches are operating at fundamental frequency, the switching losses of the inverter will be low.
REFERENCES R. Portillo, R. Vasquez, J. I. Leon, and M. M. Prants, IEEE Trans. Industrial Informatics 9, 1148 (2012).  A. Lesnicar and R. Marquardt, IEEE Bologna Tech. Conference, Bologna, Italy (2003).  R. H. Baker and L. H. Bannister, Electric Power Converter, U.S. Patent (3 867 643), (1975).  A. Nabae, I. Takahashi, and H. Akagi, IEEE Trans. Ind. Appl. 17, 518 (1981).  T. Meynard and H. Foch, EPE J. 3, 99 (1993).  M. D. Manjrekar, P. Steimer, and T. A. Lipo, Conf. Rec. IEEE/IAS Annual Meeting, 1520 (1999).  D. Zhong, L. M. Tolbert, J. N. Chiasson, and B. Ozpineci, Proceeding of Applied Power Electronics Conference and Exposition (APEC06), 426 (2006).  L. A. Serpa, Ph.D. Thesis, Swiss Federal Institute of Technology, Switzerland (2007).  E. N. Abilguard and M. Moinas, Energy Procedia 20, 227 (2012).  E. Babaei, M. F. Kangarlu, M. Sabahi, and M. R. A. Pahla vani, Electric Power System Research 96, 101 (2013).  T. BrÃ¼ckner, T. Bernet, and H. GÃ¼ldner, IEEE Trans. Ind. Electron. 52, 855 (2005).  T. BrÃ¼ckner, The active NPC converter for medium-voltage drive, Shaker Verlag (2005).  D. Floricau, E. Floricau, and M. Dumitrescu, International School on Non sinusoidal Currents and Compensation, Lagow, Poland (2008).  A. Leredde, G. Gateau, and D. Floricau, Proc. 35th Annual Conf. of IEEE Industrial Electronics IECON 09, 676 (2009.  Y. Ounejjar, K. Al-Haddad, and L. A. GrÃ©goire, IEEE Trans. Ind. Electron. 58, 1294 (2011).  E. Esfandiari and F. Mesrinejad, Journal of Circuits, Systems, and Computers 22, 1 (2013).  S. S. Fazel, Ph. D Thesis, Technische UniversitÃ¤t, Berlin (2007).  A. Lega, Ph.D. Thesis, University of Bologna, (2007).  M. R. Islam, Y. G. Guo, and J. G. Zhu, IEEE Trans. Power. Electron. 29, 4167 (2014).  P. Veena, V. Indragandhi, R. Jeybharath, and V. Subramaniyaswamy, Renewable and Sustainable Energy Reviews 34, 628 (2014).  K. A. Tehrani, I. Rasoanarivo, and F. M. Sargos, Electric Power Systems Research 81, 297 (2010).  A. K. Gupta, Ph.D. Thesis, National University of Singapore, (2008).  L. He, K. Zhang, J. Xiong, S. Fan, X. Chen, and Y. Xue, IEEE Applied Power Electronics Conference and Exposition, 799 (2015).  X. Zha, L. Xiong, J. Gong, and F. Liu, Power Electronics IET 7, 1313 (2014).  N. P. Schibli, T. Nguyen, and A. C. A. Rufer, IEEE Trans. Power. Electron. 13, 978 (1998).  C. A. Martins, X. Roboam, T. A. Meynard, and A. S. Carvalho, IEEE Trans. Power. Electron. 17, 286 (2002).  S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M.A. Perez, and J. I. Leon, IEEE Trans. Ind. Electron. 8, 2553 (2010).  J. Rodriguez, J. Pontt, G. Alzarnora, N. Becker, O. Einenekel, and A. Weinstein, IEEE Trans. Ind. Electron. 49, 1093 (2002).  M. Carpita, M. Marchesoni, M. Pellerin, and D. Moser, IEEE Trans. Ind. Electron. 55, 2203 (2008).
30] S. Dieckerhoff, S. Bernet, and D. Krug, IEEE Trans. Power. Electron. 20, 1328 (2005). S. Rahmani and K. A. Al-Haddad, IEEE International Symposium on Industrial Electronics, 925 (2006).  J. Wang and Y. Li, International Conference on Electrical Machines and Systems, 18 (2007).  B. Gultekin and M. Ermis, IEEE Trans. Power. Electron. 28, 4930 (2013).  W. Song and A. Q. Huang, IEEE Trans. Ind. Electron. 57, 2700 (2009).  R. C. Portillo, M. M. Prants, J. I. Leon, J. A. Sanchez, J. M. Carrasco, E. Galvan, and L. G. Franquelo, IEEE Trans. Ind. Electron. 53, 1483 (2006).  M. Malinowski, W. Kolomyjski, M. P. Kazmierkowski, and S. Stynski, IEEE International Conference on Industrial Technology, 1516 (2006).  P. Karuppusamy and A. M. Natarajan, Journal of Circuits, Systems, and Computers, 24, 1 (2015).  S. Alepuz, S. Busquets-Monge, J. Bordonau, J. Gago, D. Gonzalez, and J. Balcells, IEEE Trans. Ind. Electron. 53, 1504 (2006).  S. Daher, J. Schmid, and F. L. M. Antunes, IEEE Trans. Ind. Electron. 55, 2703 (2008).  I. Colak,. E. Kabalci, and R. Bayindir, Energy Conversion and Management Elsevier 52 1114 (2011). Adam, G. P., S. J. Finney, A. M. Massoud, and B. W. Williams (2008). Capacitor balance issues of the diode-clamped multilevel inverter operated in a quasi two-state mode. IEEE Transactions on Industrial Electronics, 55(8), 30883099. . Aghdam, M. G. H., S. H. Fathi, and A. Ghasemi, The analysis of conduction and switching losses in three-phase ohsw multilevel inverter using switching func tions. In 2005 International Conference on Power Electronics and Drives Systems, volume 1. IEEE, 2005. . Alamri, B. and M. Darwish, Precise modelling of switching and conduction losses in cascaded h-bridge multilevel inverters. In 2014 49th international universities power engineering conference (UPEC). IEEE, 2014. [ 44]. Alonso, O., P. Sanchis, E. Gubia, and L. Marroyo, Cascaded h-bridge multilevel converter for grid connected photovoltaic generators with independent maximum power point tracking of each solar array. In IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC03., volume 2. IEEE, 2003. . Babaei, E. (2008). A cascade multilevel converter topology with reduced number of switches. IEEE Transactions on Power Electronics, 23(6), 26572664. . Babaei, E., S. Laali, and Z. Bayat (2014). A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches. IEEE Transactions on industrial electronics, 62(2), 922929.