DOI : 10.17577/IJERTV15IS090565
- Open Access
- Authors : Dr. Parshotam S. Manhas
- Paper ID : IJERTV15IS090565
- Volume & Issue : Volume 15, Issue 09 , September – 2026
- Published (First Online): 25-09-2026
- ISSN (Online) : 2278-0181
- Publisher Name : IJERT
- License:
This work is licensed under a Creative Commons Attribution 4.0 International License
A Bilateral Floating-Gate MOSFET Current Mirror for Low-Voltage Analog Applications
Parshotam S. Manhas
Department of Physics
Govt. Gandhi Memorial College Science College Jammu (J&K)-18001, India
Abstract – Current mirrors are fundamental building blocks in analog integrated circuits and are widely employed for bias generation, current replication, and active-load realization. This work presents a bilateral floating-gate MOSFET (FGMOS) current mirror for low-voltage analog applications operating at a supply voltage of ±0.75 V. A complementary P-type FGMOS current mirror is developed and integrated with an existing low- voltage N-type FGMOS current mirror to realize a bilateral architecture capable of bidirectional current replication. The proposed P-type mirror achieves near-unity current-transfer accuracy within an error of less than ±0.05%, an output resistance of 924 G, and a bandwidth of 631 MHz while dissipating only 1.48 mW of power. The resulting bilateral FGMOS current mirror provides accurate current replication over the range of 500 µA to +500 µA, exhibits a bandwidth of 794 MHz, and dissipates 4.32 mW. Compared with conventional cascode and regulated-gate cascode current mirrors, the proposed architecture offers improved low-voltage operation, enhanced frequency response, and bidirectional current- mirroring capability. The proposed circuit provides a versatile building block for current-mode systems employed in biomedical instrumentation, IoT sensor interfaces, and portable low-power analog applications.
Keywords – floating-gate MOSFET (FGMOS); current mirror; bilateral current mirror; current-mode circuits; low-voltage analog circuits; bidirectional current replication.
INTRODUCTION
The evolution of current mirror architectures has played a fundamental role in the advancement of current-mode analog circuit design, beginning with bipolar implementations [1] and subsequently extending to CMOS technologies [2-4]. As supply voltages continued to scale with device dimensions, achieving high output resistance and wide signal swing under limited voltage headroom emerged as a major design challenge. Conventional cascode current mirrors [2] and regulated-gate cascode (RGC) structures [8] improve current-
transfer accuracy and output impedance; however, their dependence on additional voltage headroom limits their applicability in ultra-low-voltage environments. At the same time, the rapid expansion of portable electronics, biomedical instrumentation [15], and IoT sensor interfaces [16] has intensified the demand for compact, low-power, and high- bandwidth current mirrors capable of reliable operation at supply voltages below ±1 V.
Floating-gate MOSFET (FGMOS) technology has emerged as an attractive approach for low-voltage analog circuit design because it enables reduced voltage operation while maintaining accurate current transfer and high output impedance [3, 10, 12]. The feasibility of a low-voltage N-type floating-gate MOSFET (FGMOS) current mirror operating at
±0.75 V was previously demonstrated by the authors [12]. The present work extends this concept through the development of a complementary P-type FGMOS current mirror and the integration of both structures into a bilateral current mirror capable of bidirectional current replication. The resulting configuration enables accurate current replication for both positive and negative current directions under a supply voltage of only ±0.75 V. These features make the proposed architecture suitable for low-voltage current-mode applications, including biomedical instrumentation [15], IoT sensor interfaces [16], and portable analog systems.
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CIRCUIT DESIGN AND ANALYSIS
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N-Type FGMOS Current Mirror
The N-type low-voltage FGMOS current mirror reported in
[12] is shown in Fig. 1 and is included here as the reference branch of the proposed bilateral architecture. The circuit operates at ±0.75 V using a floating-gate cascode structure that provides accurate current replication, high output resistance, and low-voltage functionality.Fig. 1. Low-voltage current mirror using NMOS. Adapted from the authors' previous work [12]
Fig. 2. Performance of N-type LVCM: (a) Current-transfer characteristics; (b)
Frequency response.
The performance of the previously reported N-type low- voltage FGMOS current mirror [12] was re-evaluated using PSPICE simulations based on Level-3 MOSFET models for a
0.5 µm CMOS process under a dual supply voltage of ±0.75
V. The circuit schematic is shown in Fig. 1. At an input current of 100 µA, the mirror exhibits an input resistance of
1.174 M, an output resistance of 785.4 G, and a power dissipation of 0.221 mW. The current-transfer characteristic shown in Fig. 2(a) confirms highly accurate current replication, with a maximum deviation of less than ±0.05%
from the ideal unity-gain condition, while the frequency response presented in Fig. 2(b) indicates a bandwidth of approximately 631 MHz. These results are consistent with those reported in [12] and establish the N-type mirror as a high-performance low-voltage building block. Its low compliance voltage requirement, high output resistance, wide operating current range, and broad bandwidth make it particularly suitable for current-mode analog applications. In the present work, this previously established N-type topology is employed as one of the constituent elements for the development and evaluation of the proposed complementary P-type and bilateral FGMOS current mirror architectures.
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P-Type FGMOS Current Mirror
A complementary P-type low-voltage current mirror (LVCM) was developed as an extension of the previously reported N-type FGMOS current mirror [12] to provide current mirroring capability for the opposite current polarity and to facilitate the realization of a bilateral current mirror architecture. The proposed circuit, shown in Fig. 3, is obtained by implementing the low-voltage FGMOS current mirror using PMOS devices while preserving the fundamental design philosophy of low-voltage operation and high output impedance.
The circuit was evaluated using PSPICE simulations based on a 0.5 µm CMOS technology. The transistor dimensions (W/L) were chosen as 100 µm/0.5 µm for M0, M1, M2, M3, M6, M7, and M10; 25 µm/0.5 µm for M4, M5, M11, and M14; 50 µm/0.5 µm for M8 and M9; 10 µm/0.5 µm for M12; and 20 µm/0.5 µm for M13. The proposed topology (Fig. 3) employs a floating-gate cascode structure that enhances output resistance while maintaining reliable operation under a supply voltage of ±0.75 V.
Simulation results obtained at a bias current of 100 µA indicate an input resistance of 683.7 and an output resistance of 924.1 G, confirming the effectiveness of the proposed P-type configuration in achieving very high output impedance under low-voltage conditions. The current-transfer characteristic shown in Fig. 4(a) closely follows the ideal unity-gain response over the investigated current range, demonstrating accurate current replication. Furthermore, the frequency response presented in Fig. 4(b) exhibits a bandwidth of approximately 631 MHz while the total power dissipation remains limited to 1.48 mW. These results demonstrate that
the proposed P-type FGMOS current mirror achieves high current-transfer accuracy, wide bandwidth, high output impedance, and low power consumption.
The development of this complementary P-type mirror constitutes an important contribution of the present work, as it enables the integration of complementary N-type and P-tye structures into the bilateral FGMOS current mirror described in the following section. Consequently, the proposed circuit not only serves as an independent low-voltage current mirror but also provides the essential complementary branch required for accurate bidirectional current replication in bilateral current-mode analog systems.
Fig. 3. Low-voltage current mirror using PMOS
Fig. 4. Performance of P-type LVCM: (a) Current-transfer characteristics; (b) Frequency response.
Unlike the previously reported N-type implementation [12], the proposed P-type mirror provides complementary current mirroring functionality required for bidirectional current processing. The availability of complementary N-type and P-type structures enables realization of the bilateral current mirror presented in the next section.
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Bilateral FGMOS Current Mirror
Bilateral current mirrors are important building blocks in current-mode analog circuits because they enable current transfer in both directions and support symmetrical signal processing. Such functionality is essential in the implementation of analog subsystems including current conveyors (CCs), voltage buffers (VBs), current-feedback amplifiers (CFAs), and other bidirectional current-mode circuits. While conventional current mirrors are generally designed for single-polarity operation, many low-voltage analog applications require accurate replication of both positive and negative currents under restricted supply-voltage conditions. To address this requirement, the complementary N-type and P-type FGMOS current mirrors described in the preceding sections are integrated to form the proposed bilateral current mirror architecture.
The bilateral current mirror constitutes the principal contribution of this work. It combines the previously reported N-type low-voltage FGMOS mirror [12] with the newly developed complementary P-type mirror to achieve bidirectional current replication while preserving the advantages of floating-gate operation and low-voltage functionality. The resulting architecture, shown in Fig. 5, employs multiple-input floating-gate (MIFG) technology to provide additional design flexibility and facilitate the processing of both positive and negative current signals.
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By integrating complementary current mirror branches within a unified structure, the proposed configuration extends the functionality of FGMOS current mirrors beyond unidirectional current transfer. The bilateral architecture enables accurate current replication over both current polarities while maintaining operation at a supply voltage of only ±0.75 V. In addition, the use of MIFG technology enhances design flexibility and facilitates bidirectional current-mode signal processing under low-voltage conditions.
Fig. 5. Bilateral current mirror architecture
Fig. 6. Performance of bilateral FGMOS mirror: (a) Current-transfer characteristics; (b) Frequency response.
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RESULTS AND DISCUSSION
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Simulation Results of Proposed Architectures
The simulated performances of the N-type, P-type, and bilateral FGMOS current mirrors are discussed in this section. The previously reported N-type mirror [12], retained as a constituent building block of the bilateral architecture, exhibits an output resistance of 785.4 G, a bandwidth of 631 MHz, and a power dissipation of only 0.221 mW. The newly developed complementary P-type mirror achieves an even higher output resistance of 924.1 G while maintaining a bandwidth of 631 MHz and a power dissipation of 1.48 mW. Both configurations demonstrate near-unity current-transfer characteristics with deviations below ±0.05%.
The integration of these complementary structures results in the proposed bilateral FGMOS current mirror, which enables bidirectional current replication over the range of
500 A to +500 A. The bilateral configuration achieves a bandwidth of approximately 794 MHz while dissipating only
4.32 mW, thereby extending the functionality of the individual mirrors from unidirectional to bidirectional current processing. These results demonstrate that the proposed architecture preserves the low-voltage advantages of the constituent FGMOS mirrors while providing enhanced functional capability.
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Comparative Analysis
To assess its effectiveness, the proposed bilateral FGMOS current mirror was compared with conventional cascode mirrors, regulated-gate cascode (RGC) mirrors, previously reported FGMOS current mirrors, and recent low-voltage circuits intended for biomedical and IoT applications. Conventional cascode and RGC structures achieve high output resistance but typically require supply voltages in the range of
±1.2 V to ±2.5 V, thereby limiting their applicability in ultra- low-voltage environments. Likewise, previously reported FGMOS current mirrors generally offer reduced compliance voltage but remain restricted to unidirectional operation and bandwidths below 300 MHz.
In contrast, the proposed bilateral architecture operates at a supply voltage of only ±0.75 V while providing bidirectional current replication and a bandwidth of approximately 794 MHz. Compared with biomedical current-mode circuits [15] and IoT-oriented FGMOS implementations [16], the proposed design offers substantially higher frequency response while
maintaining low power consumption. More importantly, unlike the majority of reported low-voltage FGMOS mirrors, the proposed architecture incorporates complementary P-type and N-type structures within a unified bilateral framework, enabling accurate current transfer for both current polarities. This capability significantly broadens the applicability of FGMOS current mirrors in advanced current-mode analog circuits, including current conveyors, voltage buffers, current- feedback amplifiers, and low-power embedded systems.
The bandwidth improvement observed in the bilateral configuration can be attributed to the complementary operation of the N-type and P-type branches and the multiple- input floating-gate structure, which collectively improve signal propagation over the investigated frequency range.
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Summary of Results
Table 1 summarizes the performance of conventional and proposed current mirror architectures. While the N-type FGMOS mirror reported in [12] established the feasibility of low-voltage current mirroring, the present work extends that concept through the development of a complementary P-type mirror and the realization of a bilateral FGMOS current mirror. The proposed bilateral architecture combines low- voltage operation, bidirectional current-transfer capability, high bandwidth, and low-power dissipation, thereby providing a versatile building block for advanced current-mode integrated circuits.
The effective output resistance of the bilateral configuration is determined by the interaction of both complementary branches and the associated signal paths, resulting in a lower overall output resistance than that of the individual constituent mirrors.
TABLE 1. COMPARATIVE PERFORMANCE TABLE
Topology
Supply Voltage
Output Resistance
Bandwidth
Power Dissipation
Key Features
Cascode Mirror [2, 7]
±1.5
2.5 V
M
50150
MHz
25 mW
High impedance, poor low- voltage
compliance
Regulated- Gate Cascode (RGC) [8]
±1.2
2.0 V
100500
M
100200
MHz
24 mW
Better accuracy, limited swing
Conventional FGMOS
Mirror [10,
11]
±1.0
1.5 V
100500
M
150250
MHz
23 mW
Low-voltage capable,
bandwidth limited
Biomedical Current Mirrors [15]
±0.5
1.0 V
50200
M
100200
MHz
12 mW
Ultra-low- voltage operation for biomedical
applications
IoT-oriented FGMOS
Circuits [16]
±0.6
1.0 V
200400
M
200300
MHz
12 mW
High- bandwidth sensor
interfacing
Bilateral Current Conveyors
±0.75
1.0 V
0.20.5
M
300400
MHz
35 mW
Bilateral operation,
floating-gate based
Proposed Bilateral FGMOS
Mirror
±0.75 V
0.414 M
794 MHz
4.32 mW
Accurate bidirectional current transfer; highest bandwidth; suitable for portable, IoT, and biomedical
applications
Note: Literature values are representative ranges compiled from the cited references and are intended for qualitative comparison.
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-
CONCLUSIONS
Building upon the previously reported N-type FGMOS current mirror [12], this work presents a complementary P- type FGMOS current mirror and integrates both structures to realize a bilateral floating-gate MOSFET current mirror operating at ±0.75 V. The proposed architecture enables accurate bidirectional current replication while maintaining low-power operation and wide bandwidth.
Simulation results demonstrate that the complementary P- type mirror achieves high output impedance and near-unity current-transfer accuracy, thereby providing the essential complementary branch required for bilateral operation. The resulting bilateral FGMOS current mirror exhibits reliable current replication over the range of 500 A to +500 A, a
bandwidth of approximately 794 MHz, and a power dissipation of 4.32 mW.
The proposed bilateral FGMOS current mirror provides a practical current-mode building block for low-voltage analog and mixed-signal integrated circuits. Its ability to support bidirectional current processing broadens the applicability of floating-gate current-mirror techniques in biomedical instrumentation, IoT sensor interfaces, portable electronics, and other energy-efficient analog systems.
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