Design and Implementation of Efficient Flash ADC

In wireless communication system signal converters like analog to digital and digital to analog plays very important role. It is very typical task to achieve low power, less area occupancy, error free converters. This paper presents the design of Analog to Digital converter with less operated voltage and less power consumption. basic modules to design ADC are comparators and encoders. For conventional n-bit ADC device requires 2 comparators along with encoder. We have designed different optimization comparators and decoders to make efficient ADC device and compare the basic parameters like transistor count, average power consumption, operating frequency and operating voltage. We design Flash type ADC with less transistors, less power consumption comparator along with encoder by using Tanner EDA analog environment 180nm technology node with moderate resolution. Keywords— Analog to Digital converters, Digital to Analog converters, Low power, Comparator, Encoder, Operating frequency, Resolution.


INTRODUCTION
In wireless communication world entire signals are analogues. But we are surrounded by Digital devices. Everything in the universe measures all signals with analog only. But, how analog parameters are in digital devices?. Most of the applications are in digital signal processors only. Like microcontrollers, microprocessors. Analog to Digital converters are the mixed sigAnals of both analog and digital for processing the information or data. Present days most of the electronic applications are in digital only. Because of digital have finite set of occurrences. And also important factor is low power consumption, low operating voltage with a high speed data transmission. So we focus on efficient analog to digital converter.
We have different types of analog to digital converters like Successive Approximation (SAR), Dual slope ADC, Sigma delta ADC and Flash ADC. Among those most cases we prefer only flash ADC. "Because of its better tradeoff between its all performance metrics". [1] Some of the basic factors which depend on the performance of ADC are input signal bandwidth, resolution, quantization error, SNR, differential non linearity and integration non linearity. But resolution always inversely proportional to conversion rate of the device.

II. FLASH ADC
Among the different types of ADC's flash ADC have its more advantages. The main important factor of ADC is high conversion speed. It compares analog input along with reference threshold voltage and identifies which the value is closest through encoder and converts into digital. Basic block diagram of flash ADC shows below. In conventional type of ADC have resistor ladder, comparator and encoder modules. Among those key component is comparator. Because when n bits conversion requires 2 N -1 comparators are required. So that overall performance depends on the comparator module. And also it have an impact on overall power consumption. only the comparator module operates at a high operating voltage. When we want to design a comparator, we must have a minimum three architectures. First one is an amplifier must have high gain and single ended output, second one type of latches used in comparators. And third one is hold the input circuit and track it. Majorly it requires more gain. For MOS structure it is impossible to get high gain, so we used more number of stages.

A. Comparaots & Encoders:
The comparator is an electronic circuit which is used to compares two input signals. In an ADC one analog signal with another analog signal or a reference signal and produces binary signal as the output based on the comparison. Basic comparator circuit shows as below. We verified existing comparators like open loop comparators, TIQ comparators, two stage CMOS comparator and Fine level comparator. Among those Threshold inverter quantized comparator has better power consumption and less operating frequency so we consider Threshold inverter quantized as a comparator. And we verified two different types of encoders named as 3 bit encoder with bubble remover circuit and Thermometer to binary code encoder. Among these two thermometer to binary code encoder circuit have less number of transistors with very less voltage supply about 1.5v and less power consumption.

B. Simulation of different types of comparators:
In this section, we simulate existing comparators by using Tanner EDA 15.1 analog environment. And compare all the comparators.

C. Simulation of two types of encoders:
In this section, we simulate two types of encoders by using Tanner EDA 15.1 analog environment. And compare these two encoders.  In this section we assemble resistor ladder circuit along with Threshold inverter quantized comparators and Thermometer code to binary code encoder circuit to form a final Analog to Digital circuit. We create individual circuit as a module and make test bench for each module. Finally we have test bench ADC circuit and final ADC core circuit. As we designed entire ADC core by using 1.5V for encoder circuit and 0.6V for comparator circuit along with resistor ladder. Total core operating voltage is 2.1V i.e. very lesser voltage than compared to previous existing models. And also we verified entire ADC core power consumption that is very less in the form of micro watts.