Author(s): T Ramesh Reddy, Dr. K. Soundara Rajan
Published in: International Journal of Engineering Research & Technology
License: This work is licensed under a Creative Commons Attribution 4.0 International License.
Volume/Issue: Vol.1 - Issue 3 ( May- 2012)
This paper implements low power digital Finite Impulse Response (FIR) filter relying on radix four booth multiplier, serial multiplier and serial adder and shift add multiplier. In this paper we consider multiplier and accumulate FIR filter architecture and folded transform of linear phase FIR filter. These low power multipliers and low power adders are used to reduce dynamic power consumption of digital FIR filter.
Number of Citations for this article: Data not Available
7 Paper(s) Found related to your topic:
Publish your Ph.D/Master's Thesis Online